Electronics Forum | Fri Feb 11 18:09:11 EST 2000 | Glenn Robertson
Russ - I agree with the other guys that the problem could be black pad or some intermetallic problem, possibly related to the "conversion" to HASL finish. But my first guess is still partial reflow at wave soldering. You won't catch it by push
Electronics Forum | Mon Apr 19 10:52:05 EDT 2010 | esca
Hi, if you want to verify the gold contamination, is mandatory to use the XPS and FTIR analysis, but is difficult think about a gold contamination from 3 different manufacturers. Do you have cleaned the PCBs after an erroneous screen process ? If no
Electronics Forum | Sat Jun 21 23:15:07 EDT 2008 | mika
Also keep in mind that the CCGA column length tolerance is at minimum +/- 0.13mm from most part manufactures and they don't collapse in the same way as a BGA, therefore the paste height deposit could be critical in some rare circumstances. Board warp
Electronics Forum | Wed Sep 10 14:39:30 EDT 2008 | vladig
No, we didn't do the test you mentioned, but did EDS on the joints and didn't see carbon their (which would indicate the presence of any organic-based contaminant). For the customer the issue was closed and passed to the board shop. We did work with
Electronics Forum | Wed Sep 10 14:14:03 EDT 2008 | gregoryyork
Yes why did the Electroless Nickel layer split this is the ROOT cause. My guess is still that the resist was slightly miss registered over the copper and therefore poor adhesion of the Nickel ensued OR like I said originally the resist had contaminat
Electronics Forum | Mon Apr 19 11:26:32 EDT 2010 | davef
Independent Labs * American Competitiveness Institute; One International Plaza Suite 600, Philadelphia, PA 19113; 610-362-1200 F1290 info@aciusa.org * Bodycote Materials Testing , 847-676-2100, na.bodycote-mt.com * Foresite 765-457-8095, http://www
Electronics Forum | Fri May 07 00:52:24 EDT 2010 | boardhouse
Hi Derek, just curious of one thing - are the vias within the BGA's the only vias covered or are all vias on the board covered. Just trying to figure out what is making this area different from the rest of the board. Regarding leaching, I do not be
Electronics Forum | Thu Feb 11 20:38:47 EST 2016 | davef
Try: * J-STD-003 “Solderability Tests for Printed Boards” * IPC-4555 OSP Finish Specification
Electronics Forum | Thu Feb 11 15:04:59 EST 2016 | cinthiaap
What is the most appropriate method to solderability test in OSP surface finish PCB? I have used Edge Dip for Surface Features testing, but the results are failed in some features. I haven't also found standards to OSP surface finish. Thank you for n
Electronics Forum | Fri Feb 12 15:37:51 EST 2016 | cinthiaap
IPC-4555 has not completed yet. According to IPC org, it will be complete in mid-2017. Is there another guideline about OSP finish surface? In fact, we assembled 50 pieces and no problem. But in solderability test we have problems in some features. D
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