Electronics Forum: j-std (Page 24 of 60)

PCB Assy Cleaning

Electronics Forum | Mon Oct 02 06:41:53 EDT 2006 | saaitk

We have a customer enquiry that requires PCB assemblies to be cleaned to J-STD-001 / -004 class 3. We use both water based and no clean process chemistries. No clean flux residues are not permitted and would therefore have to be cleaned. My question

PCB Assy Cleaning

Electronics Forum | Mon Oct 02 20:28:25 EDT 2006 | davef

Assuming: * Customer board has been designed to provide for cleaning under components. * Cleaning equipment is capable. In meeting J-STD-001, your current cleaning equipment should be able to clean: * Water washable fluxes. * Low residue fluxes, pro

J-STD-001 Par 4.2.2 Temperature and Humidity

Electronics Forum | Wed Jul 18 11:49:59 EDT 2007 | davef

The auditor may be using "verify" in an ESD Program context. See ANSI/ESD S20.20 [1999], 6.1.3, Compliance Verification Plan. It gives one definition of what the auditor may be seeking. For more on verification programs, look here: http://www.protek

PWAs & PWB bake out requirements

Electronics Forum | Thu Aug 09 19:13:37 EDT 2007 | htran

DaveF, Our customer requirement is to comply with IPC-STD-001 but the J std doesn't specify the bake out temperature for populated boards and the moisture absortion rate. Right now we are baking the populated PWAs after aqueous wash at 80C at 18-48

PWAs & PWBs bake out requirements

Electronics Forum | Tue Aug 14 19:49:21 EDT 2007 | htran

My apology for not mentioned the J-STD-001DS. I didn't mean to trick you. Anyway thanks for your inputs. You are the man with the smt knowledge, I am sure that I will be asking you for some more answers again. Thank you for the link. I will loo

Moisture Sensitive part - baking

Electronics Forum | Thu Aug 30 09:56:16 EDT 2007 | blnorman

According to J-STD-033 Table 4-1, the bake out time to restore the clock to zero is not only determined by the MSL level, but the package thickness as well. Section 4.2.2 states "SMD packages shipped in low temperature carriers may not be baked in t

BGA Baking in Reels?

Electronics Forum | Sat Feb 02 08:19:40 EST 2008 | davef

Operator: use http://www.jedec.org/DOWNLOAD/search/jstd033b.pdf BillG: Sometimes, the recommended bake times are numbingly long, because the authors of J-STD-033 assumed that: * Component took-on a large amount of moisture * You want your component

Solder Paste

Electronics Forum | Thu Mar 20 10:57:28 EDT 2008 | patrickbruneel

In addition to Dave�s comments RE: Stands for RESIN (purified or modified rosin) No resin can be cleaned with pure DI water (requires saponification). L0: Stand for halide free activation which can safely be left on the boards. To my knowledge all

Is solder purity affect solder joint reliability?

Electronics Forum | Mon Jul 14 07:49:50 EDT 2008 | edmaya33

Do we really need to follow the IPC J-STD-001 Solder purity? If so, how to effectively balance the chemistry of Sn63/Pb37 other than adding a pure tin on the solder bath? Is this really needed to monitor in monthly basis?How many kgs of pure tin pe

Oxidation on PCB's

Electronics Forum | Sun Aug 03 08:27:41 EDT 2008 | davef

IPC-4553, Specification for Immersion Silver Plating for Printed Circuit Boards, 1.4.1 Solderability. This primary function of IAg is to provide a solderable surface finish, suitable for all surface mount and through-hole assembly applications and wi


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