Electronics Forum: dek and process and capability (Page 1 of 6)

SPC and Wave

Electronics Forum | Mon Jul 18 16:48:54 EDT 2005 | lupo

Hello, According with quality standards TS16949 ,QS 9000 etc. improvement can be perform when the process is stable and capable. So, if DOE is method for improvement it is a good idea, first to run SPC for investigation process stability and capa

SPC and Wave

Electronics Forum | Fri Jul 15 12:41:56 EDT 2005 | russ

You are not wrong in monitoring the Product (your really not monitoring the process). This methodology is valuable if your process is unstable (SPC is used to stabilize process). There is value in "real time" inspection of a process's product as lon

SPC and Wave

Electronics Forum | Thu Jul 14 10:37:15 EDT 2005 | pjc

Here are links to the web sites for three instruments specifcally designed to monitor wave solder process. Some have SPC logging capabilities: http://www.ecd.com/emfg/instruments/waverider/ http://www.swpc.co.il/wso.htm http://www.solderstar.com/w

Differences between screen and stencil printing

Electronics Forum | Thu Dec 16 15:00:20 EST 2004 | glaucon

Simple differences. Both processes require a very similar machine platform, controlled motion, vision fiducial recognition and alignment of a substrate (PCB or hybrid ceramic) to the "image", the image being either a stencil (hence stencil printing)

AXI and AOI

Electronics Forum | Tue Jul 09 15:20:19 EDT 2002 | pjc

When you look at the capabilities of Combo machines they tend to sacrifice performance when compared to separate X-ray and AOI machines, meaning they don't do either the X-ray or AOI operations as well as a machine that was designed to do only one. A

AXI and AOI

Electronics Forum | Tue Jul 09 10:15:17 EDT 2002 | msjohnston

Cal, Our parent company is a FAB and they are about to release a new generation of parts. Usually the die is qualified in a simple TSOP form factor. This time the first product quals will take place in the BGA and CSP from factors rather than the t

Geometric Dimensioning and Tolerancing

Electronics Forum | Sat Jun 06 09:53:59 EDT 1998 | Earl Moon

GEOMETRIC DIMENSIONING AND TOLERANCING (GDT) Using and applying GDT to printed circuitry and assemblies is very much like applying it to any other design for manufacturing (DFM) or design for assembly (DFA) requirement using concurrent engineering (C

AOI, Quality and SPC

Electronics Forum | Mon Mar 03 13:18:02 EST 2003 | msivigny

Hello phil, The use of AOI systems give us the opportunity to auto-collect defect information much the way you're using them now. AOI systems become extremely effective when the collected data is used to perform some positive change into the process.

Circuit cam and mydata

Electronics Forum | Thu Apr 09 20:18:31 EDT 2020 | jlawson

Can not speak for CircuitCam is made by Aegis Software I veliveve sound like need to get understanding of how tool is supposed to work to extract-create centroid positions. Using Gerber Only is a pattern match and cacluate logic process - ie make pac

BGA rework and inspection

Electronics Forum | Thu May 30 10:31:03 EDT 2002 | robbied

Hi Yannick. This is an issue that we are just recently getting into but here is some ifo that I have gathered so far. I have seen/ used 2 different rework machines. The one we have bought is a 'PACE TF2000' which was at the lower cost end of the mar


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