Technical Library | 2015-01-05 17:38:26.0
The impact of voiding on the solder joint integrity of ball grid arrays (BGAs)/chip scale packages (CSPs) can be a topic of lengthy and energetic discussion. Detailed industry investigations have shown that voids have little effect on solder joint integrity unless they fall into specific location/geometry configurations. These investigations have focused on thermal cycle testing at 0°C-100°C, which is typically used to evaluate commercial electronic products. This paper documents an investigation to determine the impact of voids in BGA and CSP components using thermal cycle testing (-55°C to +125°C) in accordance with the IPC-9701 specification for tin/lead solder alloys. This temperature range is more typical of military and other high performance product use environments. A proposed BGA void requirement revision for the IPC-JSTD-001 specification will be extracted from the results analysis.
Industry News | 2021-05-21 03:59:59.0
The Assembly Division of MacDermid Alpha Electronics Solutions will be presenting a technical paper: 'Advantages of Prefluxed Ribbon-wire in Multi busbar Interconnection' at the SNEC 15th(2021) International Photovoltaic Power Generation and Smart Energy Conference &Exhibitiontaking placein Shanghai, China on June 2-5,2021.
Technical Library | 2013-12-27 10:39:21.0
The head-in-pillow defect has become a relatively common failure mode in the industry since the implementation of Pb-free technologies, generating much concern. A head-in-pillow defect is the incomplete wetting of the entire solder joint of a Ball-Grid Array (BGA), Chip-Scale Package (CSP), or even a Package-On-Package (PoP) and is characterized as a process anomaly, where the solder paste and BGA ball both reflow but do not coalesce. When looking at a cross-section, it actually looks like a head has pressed into a soft pillow. There are two main sources of head-in-pillow defects: poor wetting and PWB or package warpage. Poor wetting can result from a variety of sources, such as solder ball oxidation, an inappropriate thermal reflow profile or poor fluxing action. This paper addresses the three sources or contributing issues (supply, process & material) of the head-in-pillow defects. It will thoroughly review these three issues and how they relate to result in head-in pillow defects. In addition, a head-in-pillow elimination plan will be presented with real life examples will be to illustrate these head-in-pillow solutions.
Technical Library | 2019-05-15 22:26:02.0
As the demand for higher routing density and transfer speed increases, Via-In-Pad Plated Over (VIPPO) has become more common on high-end telecommunications products. The interactions of VIPPO with other features used on a PCB such as the traditional dog-bone pad design could induce solder joints to separate during the second and thereafter reflows. The failure has been successfully reproduced, and the typical failure signature of a joint separation has been summarized.To better understand the solder separation mechanism, this study focuses on designing a test vehicle to address the following three perspectives: PCB material properties, specifically the Z-direction or out-of-plane Coefficient of Thermal Expansion (CTE); PCB thickness and back drill depth; and quantification of the driving force magnitude beyond which the separation is due to occur.
Technical Library | 2020-10-27 02:07:31.0
For companies that choose to take the Pb-free exemption under the European Union's RoHS Directive and continue to manufacture tin-lead (Sn-Pb) electronic products, there is a growing concern about the lack of Sn-Pb ball grid array (BGA) components. Many companies are compelled to use the Pb-free Sn-Ag-Cu (SAC) BGA components in a Sn-Pb process, for which the assembly process and solder joint reliability have not yet been fully characterized. A careful experimental investigation was undertaken to evaluate the reliability of solder joints of SAC BGA components formed using Sn-Pb solder paste. This evaluation specifically looked at the impact of package size, solder ball volume, printed circuit board (PCB) surface finish, time above liquidus and peak temperature on reliability. Four different BGA package sizes (ranging from 8 to 45 mm2) were selected with ball-to-ball pitch size ranging from 0.5mm to 1.27mm. Two different PCB finishes were used: electroless nickel immersion gold (ENIG) and organic solderability preservative (OSP) on copper. Four different profiles were developed with the maximum peak temperatures of 210oC and 215oC and time above liquidus ranging from 60 to 120 seconds using Sn-Pb paste. One profile was generated for a lead-free control. A total of 60 boards were assembled. Some of the boards were subjected to an as assembled analysis while others were subjected to an accelerated thermal cycling (ATC) test in the temperature range of -40oC to 125oC for a maximum of 3500 cycles in accordance with IPC 9701A standard. Weibull plots were created and failure analysis performed. Analysis of as-assembled solder joints revealed that for a time above liquidus of 120 seconds and below, the degree of mixing between the BGA SAC ball alloy and the Sn-Pb solder paste was less than 100 percent for packages with a ball pitch of 0.8mm or greater. Depending on package size, the peak reflow temperature was observed to have a significant impact on the solder joint microstructural homogeneity. The influence of reflow process parameters on solder joint reliability was clearly manifested in the Weibull plots. This paper provides a discussion of the impact of various profiles' characteristics on the extent of mixing between SAC and Sn-Pb solder alloys and the associated thermal cyclic fatigue performance.
Industry News | 2018-09-18 20:19:23.0
SHENMAO America, Inc. is pleased to announce plans to exhibit in booth 233 at SMTA International, scheduled to take place Oct. 16-17, 2018 at the Donald Stephens Convention Center in Rosemont, IL. As the world’s major solder materials provider, SHENMAO produces SMT solder paste, laser soldering paste, cored solder wire, wave solder bar, semiconductor packaging solder spheres, wafer bumping solder paste, flux and solar PV ribbon. During the two-day expo, the company will showcase its PQ10 low-temperature solder paste and PF606-P245 new generation lead-free zero halogen solder paste.
Industry News | 2007-05-30 17:19:09.0
Billerica, MA � May 24, 2007. Orbotech, Inc., the North American subsidiary of Orbotech Ltd., today announced jointly with Endicott Interconnect Technologies, Inc. (EI) that the advanced electronic interconnect supplier has placed a major multi-million dollar order for Orbotech laser direct imaging (LDI) and automated optical inspection (AOI) equipment for use in production at its facility in Endicott, NY, USA.
Technical Library | 2020-09-23 21:37:25.0
The need to minimise thermal damage to components and laminates, to reduce warpage-induced defects to BGA packages, and to save energy, is driving the electronics industry towards lower process temperatures. For soldering processes the only way that temperatures can be substantially reduced is by using solders with lower melting points. Because of constraints of toxicity, cost and performance, the number of alloys that can be used for electronics assembly is limited and the best prospects appear to be those based around the eutectic in the Bi-Sn system, which has a melting point of about 139°C. Experience so far indicates that such Bi-Sn alloys do not have the mechanical properties and microstructural stability necessary to deliver the reliability required for the mounting of BGA packages. Options for improving mechanical properties with alloying additions that do not also push the process temperature back over 200°C are limited. An alternative approach that maintains a low process temperature is to form a hybrid joint with a conventional solder ball reflowed with a Bi-Sn alloy paste. During reflow there is mixing of the ball and paste alloys but it has been found that to achieve the best reliability a proportion of the ball alloy has to be retained in the joint, particular in the part of the joint that is subjected to maximum shear stress in service, which is usually the area near the component side. The challenge is then to find a reproducible method for controlling the fraction of the joint thickness that remains as the original solder ball alloy. Empirical evidence indicates that for a particular combination of ball and paste alloys and reflow temperature the extent to which the ball alloy is consumed by mixing with the paste alloy is dependent on the volume of paste deposited on the pad. If this promising method of achieving lower process temperatures is to be implemented in mass production without compromising reliability it would be necessary to have a method of ensuring the optimum proportion of ball alloy left in the joint after reflow can be consistently maintained. In this paper the author explains how the volume of low melting point alloy paste that delivers the optimum proportion of retained ball alloy for a particular reflow temperature can be determined by reference to the phase diagrams of the ball and paste alloys. The example presented is based on the equilibrium phase diagram of the binary Bi-Sn system but the method could be applied to any combination of ball and paste alloys for which at least a partial phase diagram is available or could be easily determined.
Technical Library | 2013-06-13 15:31:24.0
Electromigration (EM) is a mass transportation mechanism driven by electron wind force, thermal gradient, chemical potential and stress gradient. According to Moore’s law, number of transistors on integrated circuits (ICs) doubles approximately every 2 years. Moore’s law holds true since its introduction in 1970s. This insatiable demand for smaller ICs size, larger integration and higher Input/Output (IO) count of microelectronics has made ball grid array (BGA) the most promising connection type in electronic packaging industry. This trend, however, renders EM reliability of solders joints a major bottleneck to hinder further development of electronics industry...
Electronic Packaging Laboratory, State University of New York
Technical Library | 2014-11-06 16:43:24.0
This paper summarizes the results of recent investigations to examine the effect of electroless nickel process variations with respect to Pb-free (Sn-3.0Ag-0.5Cu) solder connections. These investigations included both ENIG and NiPd as surface finishes intended for second level interconnects in BGA applications. Process variations that are suspected to weaken solder joint reliability, including treatment time and pH, were used to achieve differences in nickel layer composition. Immersion gold deposits were also varied, but were directly dependent upon the plated nickel characteristics. In contrast to gold, different electroless palladium thicknesses were independently achieved by treatment time adjustments.
