Electronics Forum: fr4 (Page 40 of 58)

delamination test

Electronics Forum | Tue Aug 23 16:57:29 EDT 2005 | HOSS

50% of seeing it in a single pass. The only time we do this is if we have a board off the line that has delaminated. We'll run a sample of boards through bare to confirm that we have a bad batch. Even if we see no failures on the bare boards, we'l

Etchback

Electronics Forum | Wed Oct 19 07:44:33 EDT 2005 | davef

When a hole is drilled during board fabrication, it can transfer resin from the base material (eg, FR4 core or prepreg) to cover the exposed edge of conductive material in the wall of a drilled hole. This is called resin smear. Etchback is a control

RoHS parts - leaded solder

Electronics Forum | Wed Oct 26 10:40:43 EDT 2005 | patrickbruneel

Jimmy, We've been soldering tin plated components and Ni/Sn (100% Tin) boards with leaded solder in the 80's in hirel and military applications. We never experienced reliability issues with the mechanical or electrical properties of the solder joint

cap size and copper thickness vs part size questions

Electronics Forum | Mon Nov 07 16:31:47 EST 2005 | CW

hi Bob, Thanks for the info. I understand your comments, but I am looking for specific guidance, If I am putting chip capacitors on a .063 FR4 board, what size package should we stay away from to avoid cracking? (I realize this is dependent on h

RoHS compliant PCB

Electronics Forum | Mon Feb 06 10:12:30 EST 2006 | Yash Sutariya

Hi, I authored the presentation so I may be able to help you out with your Q's. 1. IPC is in draft stage for 4 new material specs. These are in the presentation. I would focus on IPC 4101/ 121 and /124. Match your current Tg requirement to the T

Prepreg Grain Direction

Electronics Forum | Fri Mar 03 16:05:42 EST 2006 | Chris

Hi, Anyone ever perform a DOE on prepreg glass bundle direction or glass bundle grain and how or if it affects PCB warpage and chip component cracking at V-score depanel? Since most FR4 and prepreg has has 1.4 times more fiber bundles in one direct

Fillet Tearing

Electronics Forum | Thu Mar 23 07:36:42 EST 2006 | Chunks

According to the original article, no. It is formed by the FR4 expanding and then contracting. So cooling it down faster would not help - in theory. We have not gone lead free yet, so take the above with a grain of WML. My question to those that

High TG?

Electronics Forum | Tue Nov 14 04:52:57 EST 2006 | Loco

To make it even more compicated, you have CTE before Tg and after Tg, altough the after Tg is way more important, because the expantion ratio will be much bigger, a pcb supplier will usually give the before Tg value. To come back to the delamination

Wave Solder

Electronics Forum | Thu Mar 01 22:21:06 EST 2007 | davef

From our notes ... An intense evaluation was completed in 1992 that involved testing of three board types [6 layer FR4, 6 layer ceramic copper thick film, and a 4 layer copper-invar-copper board] by the Navy Surface Warfare Center, Crane, IN. [Obvio

Solder flow Ni/Au

Electronics Forum | Mon Mar 05 16:16:08 EST 2007 | Mark

Hello, We are having issue with one of the customer board. This is 10 layer PCB FR4 with black solder mask. Coating Ni/Au. Soldering leadfree. We are using 7 zones air reflow oven (zones top&bottom). We have bed solder flowing for this boards. T


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