Technical Library | 2015-03-12 18:26:16.0
Miniaturization and the integration of a growing number of functions in portable electronic devices require an extremely high packaging density for the active and passive components. There are many ways to increase the packaging density and a few examples would be to stack them with Package on Package (PoP), fine pitch CSP's, 01005 and last but not least reduced component to component spacing for active and passive components (...)This paper will discuss different layouts, assembly and material selections to reduce component to component spacing down to 100-125um (4-5mil) from today’s mainstream of 150-200um (6-8mil) component to component spacing.
Technical Library | 2017-09-28 16:36:33.0
These nano-coatings also refine the solder paste brick shape giving improved print definition. These two benefits combine to help the solder paste printing process produce an adequate amount of solder paste in the correct position on the circuit board pads. Today, stencil aperture area ratios from 0.66 down to 0.40 are commonly used and make paste printing a challenge. This paper presents data on small area ratio printing for component designs including 01005 Imperial (0402 metric) and smaller 03015 metric and 0201 metric chip components and 0.3 mm and 0.4 mm pitch micro BGAs.
Technical Library | 2021-03-04 15:22:33.0
Copper clad laminates (CCLs) with low dissipation factor (Df) are urgently needed in the fields of high-frequency communications devices. A novel resin matrix of modified poly (2,6-dimethyl-1,4- phenylene ether) (MPPE) and styrene-ethylene/butylene-styrene (SEBS) was employed in the fabrication of high-frequency copper clad laminates (CCLs). The composites were reinforced by E-glass fabrics, which were modified with phenyltriethoxysilane (PhTES). The composite laminates obtained exhibited impressive dielectric loss of 0.0027 at 10 GHz when the weight ratio of MPPE to SEBS was 5:1.
Technical Library | 2021-10-12 18:05:09.0
The remarkable increase in counterfeit parts (a factor of 4 since 2009) [1] is a huge reliability and security concern in various industries ranging from automotive electronics to sensitive military applications increasing the possibility of premature failure in critical systems [2-5]. Counterfeit parts can also incur a great financial loss to legitimate electronics companies [6]. The issue is even more alarming as the counterfeiters use more sophisticated methods making counterfeit detection a much harder task [7-8]. Therefore, it is reasonable to develop more advanced counterfeit detection methods targeting a more efficient detection of sophisticated counterfeited parts.
Technical Library | 2023-11-20 17:30:11.0
Summary for today 1. Electronic component inspection and failure analysis. 2. Component counting and material management. 3. Reverse engineering. 4. Counterfeit detection. 5. Real-time defect verification. 6. Computed tomography (CT) techniques and how to differentiate between 2D, 2.5D, and 3D x-ray inspection. 7. Design for manufacturing (DFM) and design for x-ray inspection (DFXI). 8. Voids, bridging, and head-in-pillow failures in bottom terminated components (BTC). 9. Artificial Intelligence and x-ray inspection
Technical Library | 2013-03-14 17:19:28.0
Commercial-off-the-shelf ball/column grid array packaging (COTS BGA/CGA) technologies in high reliability versions are now being considered for use in a number of National Aeronautics and Space Administration (NASA) electronic systems. Understanding the process and quality assurance (QA) indicators for reliability are important for low-risk insertion of these advanced electronic packages. This talk briefly discusses an overview of packaging trends for area array packages from wire bond to flip-chip ball grid array (FCBGA) as well as column grid array (CGA). It then presents test data including manufacturing and assembly board-level reliability for FCBGA packages with 1704 I/Os and 1-mm pitch, fine pitch BGA (FPBGA) with 432 I/Os and 0.4-mm pitch, and PBGA with 676 I/Os and 1.0-mm pitch packages. First published in the 2012 IPC APEX EXPO technical conference proceedings.
Technical Library | 2013-05-16 15:52:00.0
In response to a growing concern within the Electronic Industry to the transition to Halogen-Free laminates (HFR-Free) within the Client Market space (Desktop and Notebook computers) iNEMI initiated a HFR-Free Leadership Workgroup to evaluate the readiness of the Industry to make this transition. The HFR-Free Leadership WG concluded that the electronic industry is ready for the transition and that the key electrical and thermo-mechanical properties of the new HFR-Free laminates can meet the required criteria. The HFR-Free Leadership WG verified that the laminate suppliers can meet the capacity demands for these new HFR-Free laminates and developed a "Test Suite Methodology" (TSM) that can facilitate the comparison and choice of the right laminate to replace brominated FR4 in the Client space... First published in the 2012 IPC APEX EXPO technical conference proceedings.
Technical Library | 2016-09-08 16:27:49.0
In this investigation a test matrix was completed utilizing 900 electrodes (small circuit board with parallel copper traces on FR-4 with LPI soldermask at 6, 10 and 50 mil spacing): 12 ionic contaminants were applied in five concentrations to three different spaced electrodes with five replicas each (three different bare copper trace spacing / five replications of each with five levels of ionic concentration). The investigation was to assess the electrical response under controlled heat and humidity conditions of the known applied contamination to electrodes, using the IPC SIR (surface insulation resistance) J-STD 001 limits and determine at what level of contamination and spacing the ionic / organic residue has a failing effect on SIR.
Technical Library | 2017-03-09 17:37:05.0
This article focuses on the fabrication and characterization of stretchable interconnects for wearable electronics applications. Interconnects were screen-printed with a stretchable silver-polymer composite ink on 50-μm thick thermoplastic polyurethane. The initial sheet resistances of the manufactured interconnects were an average of 36.2 mΩ/◽, and half the manufactured samples withstood single strains of up to 74%. The strain proportionality of resistance is discussed, and a regression model is introduced. Cycling strain increased resistance. However, the resistances here were almost fully reversible, and this recovery was time-dependent. Normalized resistances to 10%, 15%, and 20% cyclic strains stabilized at 1.3, 1.4, and 1.7. We also tested the validity of our model for radio-frequency applications through characterization of a stretchable radio-frequency identification tag.
Technical Library | 2017-04-13 16:14:27.0
The drive to reduced size and increased functionality is a constant in the world of electronic devices. In order to achieve these goals, the industry has responded with ever-smaller devices and the equipment capable of handling these devices. The evolution of BGA packages and leadless devices is pushing existing technologies to the limit of current assembly techniques and materials.As smaller components make their way into the mainstream PCB assembly market, PCB assemblers are reaching the limits of Type 3 solder paste, which is currently in use by most manufacturers.The goal of this study is to determine the impact on solder volume deposition between Type 3, Type 4 and Type 5 SAC305 alloy powder in combination with stainless steel laser cut, electroformed and the emerging laser cut nano-coated stencils. Leadless QFN and μBGA components will be the focus of the test utilizing optimized aperture designs.
