Electronics Forum: accela and test (Page 7 of 30)

Mydata Pick and place

Electronics Forum | Thu May 10 02:57:03 EDT 2001 | kjellman

Hi, Why not have a look at Philips/Assembl�on, their ACM machine is quite nice. It may also bring you down to Flip Chip, 0201 some through hole and odd form placement. Nice options like bulk feeding, coplanarity tests, fluxing for FC, prom feeders (

AOI, Quality and SPC

Electronics Forum | Tue Mar 04 16:50:56 EST 2003 | msivigny

Hello Rohan, this is starting to date nearly 6 years ago but I will remember everything I can, we used a custom interface to input data and everything was stored in a very large database on a specific server only for quality data, I think we used Ora

PDBE and PBB replacements???

Electronics Forum | Fri Mar 11 18:30:50 EST 2005 | davef

Russ: In December 2003, the European Commission released the following statement: �The commission services have prepared a draft Commission decision establishing maximum concentration values pursuant to Article5(1)(a) of Directive 2002/95/EC. The pr

Flexi boards and uBGA

Electronics Forum | Fri Jul 07 03:27:31 EDT 2006 | dougs

Hi folks, thanks for all the tips. We have run our first batch of these flexi boards now. I had the PCB suppliers make me some 1.6mm FR4 carriers to lay the boards on to carry them through the process. (1 flat & 1 with cutouts for the second side)

Inspection and splicing

Electronics Forum | Tue Aug 21 08:34:03 EDT 2007 | rgduval

We have the same problems with cut/tape parts. But, we specialize in short-run prototypes, so I don't have much of a choice but to deal with it, and find a way to make it as easy as possible. We just demo'd a splice tool from Sierra Electronics (ww

Geometric Dimensioning and Tolerancing

Electronics Forum | Sat Jun 06 09:53:59 EDT 1998 | Earl Moon

GEOMETRIC DIMENSIONING AND TOLERANCING (GDT) Using and applying GDT to printed circuitry and assemblies is very much like applying it to any other design for manufacturing (DFM) or design for assembly (DFA) requirement using concurrent engineering (C

OSP and SIR

Electronics Forum | Wed Aug 21 17:44:32 EDT 2002 | davef

Splitting hairs, I expect SIR of all solderability protection, including OSP, to decrease after reflow. What�s more, I expect the SIR of all solderability protection to pretty much decrease over time. The �comb pattern� test specimens meet requirem

Re: IPC and Nepcon

Electronics Forum | Wed Nov 18 14:42:22 EST 1998 | Dave F

| I heard somewhere that SMEMA has joined IPC, and that the association has decided to boycott Nepcon from | year 2000. Can anyone tell me if this is true | Nick: SMEMA and IPC are talking about merging (EP&P, 11/98, p 18). Below is a news release

Flux Designations and Composition

Electronics Forum | Mon Jul 12 11:35:27 EDT 2004 | Pierre RICHARD

Here are some answers to my questions after a good research. I also added more definitions that could help understand this esoteric language used in assembly, specially surrounding fluxes and their use. In blue italics are comments and extracts from

MPM Accuflex questions and issues

Electronics Forum | Thu Feb 15 13:46:16 EST 2018 | aemery

Griinder, Maybe it's me, but I think what you might be saying here is that you see a reflected image of the PCB or Stencil when you and teaching the fiducials and it is interfering with the teaching routine, is that correct? If this is true it is c


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