Electronics Forum | Tue Jul 19 06:33:56 EDT 2005 | Rob
Hi GS, Thanks for responding - looks like we already put end termination coating on the label - we just call it "second level interconnect" There is a specimen label at: http://www.anglia.com/quality/labels.pdf Regarding standardising labels accr
Electronics Forum | Sun Sep 04 01:59:41 EDT 2005 | smartasp
We need to dry and clean the air in our dedicated poting and conformal coating room. Can anybody help on how to go about it. The airconditions only recycle and dry until room temperature is reached and therefore have great fluctuations and unstable p
Electronics Forum | Thu Jun 19 09:33:09 EDT 2008 | stevenvl
Hi, I'm having issues with boards sticking/jamming along the line, as well as what seems to be excessive wear along the guide rails. The boards are an Alumina Ceramic material and the rails differ by machine, but include anodized aluminum, steel, de
Electronics Forum | Fri Nov 06 11:39:17 EST 2009 | 14367
As you know, the H1N1 virus is on the move, and we are trying to take precautions. We wish to use a 60% alcohol based lotion for disinfecting our hands. It has been questioned if the added substances could be detrimental to electronic assembly board
Electronics Forum | Wed Jul 18 11:49:59 EDT 2007 | davef
The auditor may be using "verify" in an ESD Program context. See ANSI/ESD S20.20 [1999], 6.1.3, Compliance Verification Plan. It gives one definition of what the auditor may be seeking. For more on verification programs, look here: http://www.protek
Electronics Forum | Fri May 24 17:35:59 EDT 2024 | dontfeedphils
A couple questions for everyone: 1) is there an industry spec that calls out v-score depth requirements? If so, what spec is that and what are the values? I've always heard 1/3 of the depth of the PCB on each side, but I'm not sure if that's a rul
Electronics Forum | Tue Apr 11 20:26:16 EDT 2000 | Dave F
Jeremy: Parts assembler make leads of either Alloy 42 (Invar, whatever) or copper. The solderability of these leads are protected with eutectic or non-eutectic tin/lead solder, palladium or some palladium alloy, or gold. Cuppla things to consider:
Electronics Forum | Wed Feb 25 01:24:34 EST 1998 | Steve Gregory
Dave, I confess I was a tad too general and a bit too extreme describing the way ALL solder joints look on palladium coated leads. I should been more specific about the "pillow-effect". I've seen it regularly with palladium coated leads on small SOT
Electronics Forum | Fri Jan 30 14:20:55 EST 2009 | scottp
I do a lot of thermal cycle testing of new components for my company and often when I lay out a test board I'm trying to simulate 4 or 6 layer boards but I don't need them for routing so I just use a solid fill of a cross-hatch pattern. I've done it
Electronics Forum | Fri Apr 03 08:34:54 EDT 2020 | SMTA-Gregory
We need to be careful with product to avoid introducing a new failure mode, namely corrosion and dendrite growth, especially those running no clean processes! In addition to heat (reflow, wave and some selective soldering processes) killing the vi
winsouce.jpg)
