Electronics Forum | Fri Nov 27 02:09:50 EST 1998 | Chi-Ting Chen
| | I have some 1.25 mils Al wire bonding chip on board process. After epxoy-based encapsulation, I do some aging test. How can I "see" or prove that there is a "wire break" exist due to the tension of thermal cycling? How can I know the failure is c
Electronics Forum | Wed Dec 14 07:34:33 EST 2005 | davef
Mike Ozzy If I came to your house, I wouldn't punch you. I'd make you buy me beer. Vern Solberg; Tessera Technologies Inc., 3099 Orchard Dr, San Jose, CA 95134; 408 568 3734 F408 894 0768 vsolberg at tessera dot com. If that doesn't work try: Tes
Electronics Forum | Fri Sep 27 11:20:21 EDT 2002 | davef
Mar, The previous post makes the best point. Your finish spec depends on the COB process you plan to use. Is your process: * Gold wire bond * Aluminum wire bond * Flip chip * Er, watt
Electronics Forum | Tue Nov 07 21:49:05 EST 2000 | Dave F
Cheers to you Your gold plating is specified for the gold wire bonding between the die of your BGA and the pads on the BGA substrate. For solderable surfaces this is heavy on gold for use on pads. Gold SB thinner on pads to limit the amount of gol
Electronics Forum | Thu Nov 03 12:48:14 EST 2005 | Rosewood
We have some no sticks, but that is actually a good thing because we have NSD. During process control audits we found that pull strengths to the board dropped off. We build a military application that requires higher bond strenghts. Low pull streg
Electronics Forum | Fri May 29 07:17:02 EDT 2015 | anirudh_thabjul
Hiee everyone, I am a Hardware Engineer and also a PCB designer. I am using a Microntroller which is in "CHIP PACKAGE". So in order to connect our microcontroller with my PCB, i am using "Wire bonding Technology". So, Can any one suggust 1. whi
Electronics Forum | Fri Nov 27 08:07:50 EST 1998 | Earl Moon
| | | I have some 1.25 mils Al wire bonding chip on board process. After epxoy-based encapsulation, I do some aging test. How can I "see" or prove that there is a "wire break" exist due to the tension of thermal cycling? How can I know the failure is
Electronics Forum | Fri Mar 05 04:39:38 EST 1999 | Pan Tian Shun
I need advise on how can bonding of ICs to flex foil be done. The pitch of bonding is between 70 to 100 microns and the foil thickness is from 25 to 35 microns. Anyone, please enlighted what kind of bonding technology (thermo-sonic maybe), and curre
Electronics Forum | Sat Mar 06 08:45:16 EST 1999 | Dave F
| I need advise on how can bonding of ICs to flex foil be done. | The pitch of bonding is between 70 to 100 microns and the foil thickness is from 25 to 35 microns. | | Anyone, please enlighted what kind of bonding technology (thermo-sonic maybe), a
Electronics Forum | Thu Nov 03 02:34:46 EST 2005 | Rosewood
We've recently encountered some problems with wire bond strengths. I'm looking for anybody that has had some experience with different types of substrate contamination and methods for cleaning. There is no visible contamination on the gold pads, bu
