Technical Library | 2024-04-08 15:46:36.0
A designed experiment evaluated the influence of several variables on appearance and strength of Pb-free solder joints. Components, with leads finished with nickel-palladium-gold (NiPdAu), were used from Texas Instruments (TI) and two other integrated circuit suppliers. Pb-free solder paste used was tin-silver-copper (SnAgCu) alloy. Variables were printed wiring board (PWB) pad size/stencil aperture (the pad finish was consistent; electrolysis Ni/immersion Au), reflow atmosphere, reflow temperature, Pd thickness in the NiPdAu finish, and thermal aging. Height of solder wetting to component lead sides was measured for both ceramic plate and PWB soldering. A third response was solder joint strength; a "lead pull" test determined the maximum force needed to pull the component lead from the PWB. This paper presents a statistical analysis of the designed experiment. Reflow atmosphere and pad size/stencil aperture have the greatest contribution to the height of lead side wetting. Reflow temperature, palladium thickness, and preconditioning had very little impact on side-wetting height. For lead pull, variance in the data was relatively small and the factors tested had little impact.
Technical Library | 2008-01-16 18:25:55.0
The consumer's interest for smaller, lighter and higher performance electronics products has increased the use of ultra fine pitch packages, such as Flip Chips and Chip Scale Packages, in printed circuit board (PCB) assembly. The assembly processes for these ultra fine pitch packages are extremely complex and each step in the assembly process influences the assembly yield and reliability.
Technical Library | 2010-03-25 06:26:37.0
The complexity of Printed Circuit Assembly process is increasing day by day and causing productivity issues in the industry, introducing ultra fine pitch components (pitch less than 15mil) in PCA is a challenge to minimize risk of defects as solder short, dry solder. This paper is focusing on minimizing these defects.
Technical Library | 2018-03-07 22:41:05.0
This study investigates the scooping effect during solder paste printing as a function of aperture width, aperture length and squeegee pressure. The percent of the theoretical volume deposited depends on the PWB topography. A typical bimodal percent volume distribution is attributed to poor release apertures and large apertures, where scooping takes place, yielding percent volumes 100%. This printing experiment is done with a concomitant validation of the printing process using standard 3D Solder Paste Inspection (SPI) equipment.
Technical Library | 2023-06-12 16:52:47.0
The technological advancement of component and PCB technology from through-hole to surface mount (SMT) is a major factor in the miniaturization of today's electronics. Smaller and smaller component sizes and more densely packed PCBs lead to more powerful designs in much smaller product packages. With advancement, however, comes a new set of challenges in building these smaller, more complex assemblies. This is the challenge original equipment manufacturers (OEM) and contract manufacturers (CM) face today.
Technical Library | 2018-10-03 20:41:44.0
Voids in solder joints plague many electronics manufacturers. Do you have voids in your life? We have good news for you, there are many excellent ways to "Fill the Void." This paper is a continuation of previous work on voiding in which the following variables were studied: water soluble lead-free solder pastes, a variety of stencil designs, and reflow profiles. Quad Flat No-Lead (QFN) component thermal pads were used as the test vehicle. The voiding results were summarized and recommendations were made for reduction of voiding.
Technical Library | 2020-12-29 20:55:46.0
Voiding in solder joints has been studied extensively, and the effects of many variables compared and contrasted with respect to voiding performance. Solder paste flux, solder powder size, stencil design, circuit board design, via-in-pad design, surface finish, component size, reflow profile, vacuum reflow, nitrogen reflow and other parameters have been varied and voiding quantified for each. The results show some differences in voiding performance with respect to most of these variables but these variables are not independent of each other. Voiding in solder joints is a complex issue that often requires multiple approaches to reduce voiding below required limits. This paper focuses on solutions to voiding for commonly used bottom terminated components (BTCs).
Technical Library | 2010-05-06 18:46:29.0
Stencil printing technology has come a long way since the early 80’s when SMT process gained importance in the electronics packaging industry. In those early days, components were fairly large, making the board design and printing process relatively simple. The current trend in product miniaturization has led to smaller and more complex board designs. This has resulted into designs with maximum area utilization of the board space. It is not uncommon, especially for hand held devices, to find components only a few millimeters from the edge of the board. The board clamping systems used in the printing process have become a significant area of concern based on the current board design trend.
Technical Library | 2018-06-13 11:42:00.0
The art of screen printing solder paste for the surface mount community has been discussed and presented for several decades. However, the impending introduction of passive Metric 0201 devices has reopened the need to re-evaluate the printing process and the influence of stencil architecture. The impact of introducing apertures with architectural dimensions’ sub 150um whilst accommodating the requirements of the standard suite of surface mount connectors, passives and integrated circuits will require a greater knowledge of the solder paste printing process.The dilemma of including the next generation of surface mount devices into this new heterogeneous environment will create area ratio challenges that fall below todays 0.5 threshold. Within this paper the issues of printing challenging area ratio and their associated aspect ratio will be investigated. The findings will be considered against the next generation of surface mount devices.
Technical Library | 2021-04-21 15:10:16.0
Voids affect the thermal characteristics and mechanical properties of a solder joint, thereby affecting the reliability of the solder interconnect. The automotive sector in particular is requiring the mitigation of solder voids in various electronic control modules to the minimum possible level. Earlier research efforts performed to decrease voids involved varying the reflow profile, paste deposit, paste alloy composition, stencil aperture, and thickness. Due to the various advantages they offer, the use of Ball Grid Array packages is common across all industry sectors. They are also prone to process voiding issues. This study was performed to determine if vacuum assisted reflow process can help alleviate the voids in area array solder joints. Test parameters in this study largely focused on vacuum pressure level and vacuum dwell time.
