PCB Libraries, Inc. | https://www.pcblibraries.com/forum/RSS_library-expert-2016-10-released_topic1951.xml
HolesFIXED:Calculator:Non-plated Hole footprint name now has a “A” when Annular Ring Pad Shape is usedUpdated the indicator light in the Viewer to enhance the description of the various colorsFixed all parts with Thermal Tabs with disappearing radius corners when
PCB Libraries, Inc. | https://www.pcblibraries.com/forum/library-expert-2017-13-released_topic2147_post8899.html
!! NEW / ENHANCED: Updated all Terminal Lead-Form images in the Calculator and Preferences FIXED: Calculator: Fixed an issue with the Pin Rename feature
PCB Libraries, Inc. | https://www.pcblibraries.com/forum/topic2147&OB=DESC.html
!! NEW / ENHANCED: Updated all Terminal Lead-Form images in the Calculator and Preferences FIXED: Calculator: Fixed an issue with the Pin Rename feature
PCB Libraries, Inc. | https://www.pcblibraries.com/forum/topic1788&OB=DESC.html
Jeff.M Report Post Thanks(1) Quote Reply Posted: 05 Nov 2015 at 9:40am 1. Yes, WRT lead diameter or diagonal if not round. 2. Yes, Minimum Annular Ring will never be less than this value
PCB Libraries, Inc. | https://www.pcblibraries.com/forum/how-to-use-pth-reference-calculator_topic1788_post7314.html
, I have a few more basic question, regarding the PTH reference calculator: 1. Hole over Lead - this refers to how much larger the hole diameter should be, WRT lead diameter? 2
PCB Libraries, Inc. | https://www.pcblibraries.com/Forum/topic959&OB=ASC.html
(CAPAE) BGA (Ball Grid Array) CGA (Column Grid Array) Crystal LGA (Land Grid Array) with Round Lead LGA (Land Grid Array) with Square Lead QFP (Quad Flat Pack) QFP (Quad Flat Pack
PCB Libraries, Inc. | https://www.pcblibraries.com/forum/topic959&OB=ASC.html
(CAPAE) BGA (Ball Grid Array) CGA (Column Grid Array) Crystal LGA (Land Grid Array) with Round Lead LGA (Land Grid Array) with Square Lead QFP (Quad Flat Pack) QFP (Quad Flat Pack
PCB Libraries, Inc. | https://www.pcblibraries.com/Forum/library-expert-2019-05-released_topic2516_post10361.html
!! NEW / ENHANCED: Drafting Symbols: Added Bottom Solder Mask layer Altium: Changed the default Target Library form “Use Existing” to “Create New” FIXED: Drafting Symbols: Fixed an issue when re-selecting the Drafting Outline on the Top Solder Mask layer, the Preference setting flipped back to Top Legend Calculator
PCB Libraries, Inc. | https://www.pcblibraries.com/forum/topic2516&OB=ASC.html
!! NEW / ENHANCED: Drafting Symbols: Added Bottom Solder Mask layer Altium: Changed the default Target Library form “Use Existing” to “Create New” FIXED: Drafting Symbols: Fixed an issue when re-selecting the Drafting Outline on the Top Solder Mask layer, the Preference setting flipped back to Top Legend Calculator
| http://etasmt.com/cc?ID=te_news_bulletin,14161&url=_print
. The components are directly immersed in the molten solder, so the components are subject to small thermal shock. However, due to different heating methods for lead-free reflow, larger thermal stresses are sometimes applied to components; 2
