Electronics Forum | Fri Feb 15 08:13:18 EST 2002 | Dave G
What Snap-Off are you running ? I've seen this happen when a large negative Snap-Off is used. If you "contact" print (I.E. Zero Snap-Off) this tends to minimize the stencil coining. We use a mix of MPM & Transition Automation blades. I have noticed
Electronics Forum | Mon Feb 25 07:59:47 EST 2002 | Jim Mills
Customer has requested a custom CBGA pakaged resistor network.I've seen a lot of info about TCE mismatch but aslo have heard that using 0.025-0.030 balls offers some stress releif which allows for the TCE mismatch to become less of a problem. Would
Electronics Forum | Wed Mar 06 11:51:04 EST 2002 | caldon
The EMPF has a great Paper regarding the Omega meter. www.empf.org (Click the Tech Pubs Icon) Here you will find a host of technical papers. These papers were relevant in their time but most have proved to be irrelevant in current day manufacturing.
Electronics Forum | Mon Jul 07 00:33:12 EDT 2003 | praveen
First we have to look in to the current situiation of the SMT line.Is the pick and place machine very old and can not perform consistently. Is the board to be inspected is very dense and have lots of connectors and fine pitch comp.with lots of 0402 c
Electronics Forum | Mon Jul 07 21:08:17 EDT 2003 | sam
I have an experience about AOI that it is necessary in a complicated PCB. Due to the final circuit design, the concerned PCB were having nets on the boards, that the Open/Short could not be identified by traditional In-Circuit testers. Some long tr
Electronics Forum | Fri Mar 08 11:44:00 EST 2002 | poirot
I manufacture industrial ink jet printers. I have a new application to join an unpopulated flex circuit to a light ly populated PCB. Production requirements are rather low. The area To join is 300 solder balls on the flex occupying an area of 5/8 i
Electronics Forum | Wed Mar 20 11:55:19 EST 2002 | slthomas
Interesting. Ours failed miserably. Of course we toss everything on the stencil at the end of a shift (they are instructed to let it run down to minimal volume on the stencil as they approach quitting time) so it's not an issue. We are more concer
Electronics Forum | Wed Mar 20 00:55:01 EST 2002 | ianchan
Heyz...at this rate i'am losing my mind too! We have been doing the "looks good; look bad" approach, and backed it all up with Z-height paste measurements. Only thing there's this customer QA asking how we established those USL & LSL utilized in our
Electronics Forum | Tue Mar 19 11:52:25 EST 2002 | davef
We have had Corfin recommended to us, but have never needed to use them. Also consider: * EMPF uses a ROSA process for solder rejuvenation. Check with Cal [at Manncorp, a SMTnet regular] for the scoop [chocolate, vanilla, or ROCKY ROCOCO] on EMPF.
Electronics Forum | Fri Mar 22 21:31:25 EST 2002 | ianchan
Hi Guys, Anyone have "comments/testimony" on having possible quality level achievements, for AQL=0.1, C=0 ??? Is this a realistic "1st Pass Yield" expectation? how about for OQC submission Lots from production? especially in a high-mix, low-volu
