Electronics Forum | Wed Feb 17 13:02:03 EST 2016 | comatose
The layer count itself isn't going to be what drives yields. What is the trace/space? How much annular ring for vias did you give them to play with? Class 2 or class 3? What's the worst hole aspect ratio? Controlled impedance? The closer you run to y
Electronics Forum | Thu Dec 05 02:15:12 EST 2019 | sssamw
IPC 2221B mentions a minimum clearance of 0.5 mm between adjacent holes. A drill-to-drill spacing of 20 mils is a standard value in manufacturer design rules. For small annular rings and pad-to-pad clearance, the minimum via distance is often defin
Electronics Forum | Mon Jun 29 16:03:24 EDT 2020 | spoiltforchoice
I certainly can on the Paraquda and I suspect the basic algorithms are the same. Slimmer annular rings such as you might get on a plated via hole don't always image quite as well but if for some reason it doesn't pick it up you should be able to inte
Electronics Forum | Fri Aug 03 12:24:14 EDT 2001 | hinerman
I can only describe how the Grid Lok handles component variability. The compliant caps have an annular ring that is very soft and can mold to different shapes. If a component shows up where there was no component before, the outside of the cap bend
Electronics Forum | Mon Dec 13 00:48:33 EST 1999 | armin
Hi All I have a 0.7 mm diameter hole for vias, what�s the minimum annular ring for this hole diameter? What�s the term unsupported and supported holes refer to in IPC-2221 9.1.2 Annular Ring Requirements? I have a proto-type PCB (designed by our R&
Electronics Forum | Tue Dec 17 17:47:49 EST 2002 | Tim Marc
Dave, I�m talking about the 75% vertical fill of solder IPC 6.3 criteria (B), and 6.3.1 Fig 6-5. I also referred to the annular ring of the Plated-Through-Hole, being coated with solder mask. Semantics, yes I did refer to the Plated-Through-Hole (Sup
Electronics Forum | Thu Feb 13 07:13:39 EST 2003 | davef
Tell us more about the location of the bridging [ie, front-to-back, back-to-back, front-to-front, etc]. Thoughts are: * Your annular ring around the hole seems large. You have 0.007", consider 0.003" to be the minimum. Your board fabricator can gi
Electronics Forum | Wed Nov 02 21:58:17 EST 2005 | KEN
Copper wire will become thinner when dipped in tin/lead or lead free solder. The copper is disolved off of the bulk wire. This is one reason rework on solder pots must be restricted. Eventually, after repeated cycles you will have smaller and sma
Electronics Forum | Thu Nov 08 08:44:22 EST 2007 | aj
Hi, I have just taken a look at the Connector Images. Is there a difference in pitch between both connectors ? From the photo it looks like the Annular Rings are oversized on Image #1 especially around the centre area ( this might be the image ).
Electronics Forum | Fri Nov 09 07:13:20 EST 2007 | hussman
You're joking rite? I mean the pitch between these two connectors is night and day. Of course you will get shorts on the 96 pin connector because your leads are right on top of each other. Now, what to do about it: You took a picture of the top o
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