Electronics Forum: percent (Page 10 of 21)

Solderality problems with SN100C Lead Free Hasl

Electronics Forum | Mon Oct 02 10:50:02 EDT 2006 | bradlanger

Bob, I agree that these are all board shop issues. I think the only one that is related to the Hasl process is the surface mount solerability issues. I think they are still putting the coating on too thin even though they say it is fine. This proble

Look what I found - is this stencil printer a known product?

Electronics Forum | Sat Oct 21 21:39:43 EDT 2006 | Mats

"Surface Mount Techniques has approximately 98 percent of the world market share of large Panel Stencil Printers". It sounds a little bit strange to me, especially since I work for one of the companys listed in their advertisement and it is definite

Skewed components

Electronics Forum | Tue Mar 06 19:45:52 EST 2007 | davef

DPAK align on the tab with leaded solders. They don't align much with unleaded solders, but we know that your Indium NC-SMQ 92J is leaded. So, there may be too much paste on the heat sink tab causing the component to float [or wim] during reflow. If

Voids in thru-hole solder joints

Electronics Forum | Tue Nov 13 21:59:42 EST 2007 | davef

This processes has the potential to cause barrel cracking and pad lifting, because the heating is very hot [troop crank-up the volume on their iron when they see thick boards] for a relatively small area on one side of the board. What do we suggest

SAC305 Lead Frame Component with Leaded Process?

Electronics Forum | Tue Sep 16 16:03:43 EDT 2008 | vladig

Well, typical content of Pb in Sn/Pb polating is a few percent (just to mitigate Sn whiskers growth). Therefore, the lead finished with SAC305 won't be much different from those finished with Sn/Pb. You can make one or two cross-sections for sanity c

Wirebond issues near SM

Electronics Forum | Sat Oct 31 01:22:35 EDT 2009 | mysmt

We have performed some EDS analysis and found > high percent (approx 18% ) of Ni on surface of > gold pad. Found Tungsten as well. This is an > HTCC alumina package. Thickness of gold was > confirmed and found to be in spec. We believe > we

QFP footprint -extended outside pad?

Electronics Forum | Fri Sep 16 08:01:06 EDT 2011 | davef

We see no advantage to extending the toe-end of pads. Hell, 90 percent of the time the numb-end of the toe of the component lead isn't plated. So, it doesn't take solder. Further, solder on the toe adds little, if anything to the strength on the sold

PCB Solder Mask Adhesion

Electronics Forum | Tue Oct 09 11:17:56 EDT 2012 | 18424

Hello All, I have PCB's in a 30 up panel that have signs of improper solder mask adhesion. Per IPC 6012 they specify a maximum of 5 Percent allowed to have problems adhering to base laminate per class 2. I am trying to figure out if this 5% is for th

BCC Technology --- Placement, Rework, Reflow

Electronics Forum | Thu Aug 08 10:58:18 EDT 2002 | Tom Gervascio

I'm interested in sharing any information on bumping of LAnd Grid Array (i.e. QFN) packages. due to PCB contraints, it's not possible to stencil paste onto sites for QFNs. That lead to a lot of experimentation with bumping of 6 mm QFN packages.In sum

Silver finish components

Electronics Forum | Mon Dec 19 08:56:18 EST 2005 | davef

Q1a. If the thickness of the silver is too much (how is too much??), A1a. We have heard stories of using Ag2 to limit silver [or gold] dissolution, but have never seen formal studies to demonstrate that idea. First, exclude the use of silver plate


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