Technical Library | 2021-10-20 18:21:06.0
The solderability of the SAC305 alloy in contact with printed circuit boards (PCB) having different surface finishes was examined using the wetting balance method. The study was performed at a temperature of 260 _C on three types of PCBs covered with (1) hot air solder leveling (HASL LF), (2) electroless nickel immersion gold (ENIG), and (3) organic surface protectant (OSP), organic finish, all on Cu substrates and two types of fluxes (EF2202 and RF800). The results showed that the PCB substrate surface finish has a strong effect on the value of both the wetting time t0 and the contact angle h. The shortest wetting time was noted for the OSP finish (t0 = 0.6 s with EF2202 flux and t0 = 0.98 s with RF800 flux), while the ENIG finish showed the longest wetting time (t0 = 1.36 s with EF2202 flux and t0 = 1.55 s with RF800 flux). The h values calculated from the wetting balance tests were as follows: the lowest h of 45_ was formed on HASL LF (EF2202 flux), the highest h of 63_ was noted on the OSP finish, while on the ENIG finish, it was 58_ (EF2202 flux). After the solderability tests, the interface characterization of cross-sectional samples was performed by means of scanning electron microscopy coupled with energy dispersive spectroscopy.
Technical Library | 2013-07-18 12:12:40.0
Lead-free nanosolders have shown promise in nanowire and nanoelectronics assembly. Among various important parameters, melting is the most fundamental property affecting the assembly process. Here we report that the melting behavior of tin and tin/silver nanowires and nanorods can be significantly affected by the surface oxide of nanosolders.
Department of Chemical Engineering, University of Massachusetts
Technical Library | 2023-05-02 19:06:43.0
As 0402 has become a common package for printed circuit board (PCB) assembly, research and development on mounting 0201 components is emerging as an important topic in the field of surface mount technology for PWB miniaturization. In this study, a test vehicle for 0201 packages was designed to investigate board design and assembly issues. Design of Experiment (DOE) was utilized, using the test vehicle, to explore the influence of key parameters in pad design, printing, pick-andplace, and reflow on the assembly process. These key parameters include printing parameters, mounting height or placement pressure, reflow ramping rate, soak time and peak temperature. The pad designs consist of rectangular pad shape, round pad shape and home-based pad shape. For each pad design, several different aperture openings on the stencil were included. The performance parameters from this experiment include solder paste height, solder paste volume and the number of post-reflow defects. By analyzing the DOE results, optimized pad designs and assembly process parameters were determined.
Technical Library | 2019-09-24 15:41:53.0
This paper focuses on three different coating material groups which were formulated to operate under high thermal stress and are applied at printed circuit board manufacturing level. While used for principally different applications, these coatings have in common that they can be key to a successful thermal management concept especially in e-mobility and lighting applications. The coatings consist of: Specialty (green transparent) liquid photoimageable solder masks (LPiSM) compatible with long-term thermal storage/stress in excess of 150°C. Combined with the appropriate high-temperature base material, and along with a suitable copper pre-treatment, these solder resists are capable of fulfilling higher thermal demands. In this context, long-term storage tests as well as temperature cycling tests were conducted. Moreover, the effect of various Cu pre-treatment methods on the adhesion of the solder masks was examined following 150, 175 and 200°C ageing processes. For this purpose, test panels were conditioned for 2000 hours at the respective temperatures and were submitted to a cross-cut test every 500 h. Within this test set-up, it was found that a multi-level chemical pre-treatment gives significantly better adhesion results, in particular at 175°C and 200°C, compared with a pre-treatment by brush or pumice brush. Also, breakdown voltage as well as tracking resistance were investigated. For an application in LED technology, the light reflectivity and white colour stability of the printed circuit board are of major importance, especially when high-power LEDs are used which can generate larger amounts of heat. For this reason, a very high coverage power and an intense white colour with high reflectivity values are essential for white solder masks. These "ultra-white" and largely non-yellowing LPiSM need to be able to withstand specific thermal loads, especially in combination with high-power LED lighting applications. The topic of thermal performance of coatings for electronics will also be discussed in view of printed heatsink paste (HSP) and thermal interface paste (TIP) coatings which are used for a growing number of applications. They are processed at the printed circuit board manufacturing level for thermal-coupling and heat-spreading purposes in various thermal management-sensitive fields, especially in the automotive and LED lighting industries. Besides giving an overview of the principle functionality, it will be discussed what makes these ceramic-filled epoxy- or silicone-based materials special compared to using "thermal greases" and "thermal pads" for heat dissipation purposes.
Technical Library | 2023-07-25 16:42:54.0
Printing solder paste for very small components like .3mm pitch CSP's and 01005 Chip Components is a challenge for the printing process when other larger components like RF shields, SMT Connectors, and large chip or resistor components are also present on the PCB. The smaller components require a stencil thickness typically of 3 mils (75u) to keep the Area Ratio greater than .55 for good paste transfer efficiency. The larger components require either more solder paste height or volume, thus a stencil thickness in the range of 4 to 5 mils (100 to 125u). This paper will explore two stencil solutions to solve this dilemma. The first is a "Two Print Stencil" option where the small component apertures are printed with a thin stencil and the larger components with a thicker stencil with relief pockets for the first print. Successful prints with Keep-Outs as small as 15 mils (400u) will be demonstrated. The second solution is a stencil technology that will provide good paste transfer efficiency for Area Ratio's below .5. In this case a thicker stencil can be utilized to print all components. Paste transfer results for several different stencil types including Laser-Cut Fine Grain stainless steel, Laser-Cut stainless steel with and w/o PTFE Teflon coating, AMTX E-FAB with and w/o PTFE coating for Area Ratios ranging from .4 up to .69.
Technical Library | 2015-09-17 17:36:56.0
RoHS legislated restrictions on the materials used in electronics manufacture have imparted significant challenges on the electronics industry since their introduction in 2006. The greatest impacts have been felt by the mandated elimination of lead from electronic solder followed by the demand for the elimination of haloids from flame retardants used in traditional PCB laminates. In the years which have followed the electronics industry has been beset with a host of new challenges in its effort to comply. Failure mechanisms, both new and old, have surfaced which demand solution and the industry suppliers and manufacturing technologists have worked diligently to remedy those vexing faults through the development of a wide range of new materials and equipment for both board manufacture and assembly, along with modifications to the processes used in the manufacture and assembly of printed circuit boards.
Technical Library | 2023-04-17 21:17:59.0
The purpose of this paper is to evaluate and compare the effectiveness and sensitivity of different cleanliness verification tests for post soldered printed circuit board assemblies (PCBAs) to provide an understanding of current industry practice for ionic contamination detection limits. Design/methodology/approach – PCBAs were subjected to different flux residue cleaning dwell times and cleanliness levels were verified with resistivity of solvent extract, critical cleanliness control (C3) test, and ion chromatography analyses to provide results capable of differentiating different sensitivity levels for each test. Findings – This study provides an understanding of current industry practice for ionic contamination detection using verification tests with different detection sensitivity levels. Some of the available cleanliness monitoring systems, particularly at critical areas of circuitry that are prone to product failure and residue entrapment, may have been overlooked. Research limitations/implications – Only Sn/Pb, clean type flux residue was evaluated. Thus, the current study was not an all encompassing project that is representative of other chemistry-based flux residues. Practical implications – The paper provides a reference that can be used to determine the most suitable and effective verification test for the detection of ionic contamination on PCBAs. Originality/value – Flux residue-related problems have long existed in the industry. The findings presented in this paper give a basic understanding to PCBA manufacturers when they are trying to choose the most suitable and effective verification test for the detection of ionic contamination on their products. Hence, the negative impact of flux residue on the respective product's long-term reliability and performance can be minimized and monitored effectively.
Technical Library | 2023-07-25 16:50:02.0
Some of the new handheld communication devices offer real challenges to the paste printing process. Normally, there are very small devices like 01005 chip components as well as 0.3 mm pitch uBGA along with other devices that require higher deposits of solder paste. Surface mount connectors or RF shields with coplanarity issues fall into this category. Aperture sizes for the small devices require a stencil thickness in the 50 to 75 um (2-3 mils) range for effective paste transfer whereas the RF shield and SMT connector would like at least 150 um (6 mils) paste height. Spacing is too small to use normal step stencils. This paper will explore a different type of step stencil for this application; a "Two-Print Stencil Process" step stencil. Here is a brief description of a "Two-Print Stencil Process". A 50 to 75 um (2-3 mils) stencil is used to print solder paste for the 01005, 0.3 mm pitch uBGA and other fine pitch components. While this paste is still wet a second in-line stencil printer is used to print all other components using a second thicker stencil. This second stencil has relief pockets on the contact side of the stencil any paste was printed with the first stencil. Design guidelines for minimum keep-out distances between the relief step, the fine pitch apertures, and the RF Shields apertures as well relief pocket height clearance of the paste printed by the first print stencil will be provided.
Technical Library | 2016-10-27 16:24:23.0
Press-fit technology is a proven and widely used and accepted interconnection method for joining electronics assemblies. Printed Circuit Board Assembly Systems and typical functional subassemblies are connected through press-fit connectors. The Press-Fit Compliant Pin is a proven interconnect termination to reliably provide electrical and mechanical connections from a Printed Circuit Board to an Electrical Connector. Electrical Connectors are then interconnected together providing board to board electrical and mechanical inter-connection. Press-Fit Compliant Pins are housed within Connectors and used on Backplanes, Mid-planes and Daughter Card Printed Circuit Board Assemblies. High reliability OEM (Original Equipment Manufacturer) computer designs continue to use press-fit connections to overcome challenges associated with soldering, rework, thermal cycles, installation and repair. This paper investigates the technical roadmap for press fit technology, putting special attention to main characteristics such, placement and insertion, inspection, repair, pin design trends, challenges and solutions. Critical process control parameters within an assembly manufacturing are highlighted.
Technical Library | 2017-04-13 16:14:27.0
The drive to reduced size and increased functionality is a constant in the world of electronic devices. In order to achieve these goals, the industry has responded with ever-smaller devices and the equipment capable of handling these devices. The evolution of BGA packages and leadless devices is pushing existing technologies to the limit of current assembly techniques and materials.As smaller components make their way into the mainstream PCB assembly market, PCB assemblers are reaching the limits of Type 3 solder paste, which is currently in use by most manufacturers.The goal of this study is to determine the impact on solder volume deposition between Type 3, Type 4 and Type 5 SAC305 alloy powder in combination with stainless steel laser cut, electroformed and the emerging laser cut nano-coated stencils. Leadless QFN and μBGA components will be the focus of the test utilizing optimized aperture designs.
