Voiding in CSP Ground pad

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Hi all, We are using small CSPs (10x10mm) in one of our p... - Feb 03, 2003 by Vinesh Gandhi

If the voiding is not related to entrapped air in your vias,... - Feb 05, 2003 by davef

We went to Indium WS to help reduce this type of issuse as w... - Feb 07, 2003 by Doug Philbrick

Hi I am pretty sure it isn't the pad that is causing the ... - Feb 07, 2003 by

Hi Gee, It seems funny to comment on your own post. I ... - Feb 07, 2003 by

Vinesh Gandhi

#23241

Voiding in CSP Ground pad | 3 February, 2003

Hi all,

We are using small CSPs (10x10mm) in one of our products which has a big ground pad in the center (7x7mm). The maximum voiding allowed on this big pad is also no greater than 25% which we are finding very hard to achieve. The centre pad has four via holes which are placed in an unsymmetrical way.

The component and the PCB pad both are gold plated

Solder paste used is WS (63/37).

The Peak temperature is 218�C and the time above liquidus is approx. 55 Sec.

The stencil used is 5 mils thick.We tried divinding the stencil aperture for this pad into four pads by having a rib of 0.012". But it does not help in reducing the voiding.

Any suggestions on improvoing the voding or is it really practical to try to achieve less than 25% voiding on such a big pad. Help Guys.

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davef

#23282

Voiding in CSP Ground pad | 5 February, 2003

If the voiding is not related to entrapped air in your vias, consider trying a different paste.

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Doug Philbrick

#23308

Voiding in CSP Ground pad | 7 February, 2003

We went to Indium WS to help reduce this type of issuse as well might want to think about a cross through the middle this has also helped us on similar issues.

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MA/NY DDave

#23310

Voiding in CSP Ground pad | 7 February, 2003

I am pretty sure it isn't the pad that is causing the problem. To me it seems like those via holes through the pcb either to an internal plane or to the other side.

I can imagine creating an interesting stencil to accomodate the vias yet you are going to have to have some voiding by design to create a reliable solder joint.

I am only guessing what this CSP (Chip Scale Packaging) looks like and what the PCB looks like.

YiE, DDave

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MA/NY DDave

#23311

Voiding in CSP Ground pad | 7 February, 2003

Gee, It seems funny to comment on your own post.

I notice that the original poster and a respondent, like me, are striving to create some voiding by design to improve the way this joint will form. NEAT!!

I still think that those vias as DaveF pointed out might be the real problem. In addition to air which is a bummer when temporarily sealed, some of the flux chemicals just have no place to go and come out later to bite you with a relability hit.

The design of this joint may be basically bad, and all you are doing is to lessen the short term and maybe long term reliability effects.

YiE, DDave

This message was posted via the Electronics Forum @

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