hello;
When we are doing component land pattern design , one thing will always be in our mind; that is the basic criteria or common land pattern design guideline for reflow and flow solder assemblies.
For basic fomula in calculating resistors are:
Land width (X)= W(max) - K Land length (Y)= H(max) + K
So that the gap in between lands would be (A)= L(max)- 2T(max)- K whereby W = The width of component H = " height " " L = " length " " T = " solderable termination K = a constant value of 0.254 mm or 0.010"
Please take note that all final numbers calculated from this equation should be rounded to the nearest logical land size , taking in to consideration that board fab processing tolerance can reduce or enlarge the conductive pattern on the P&I structure by some amount depending on the class.
A slight modification in the formula for calculating the land pattern capacitors however, that is the lenght is determine by the following fomula:-
Y=H(max) + T(max) - K ,where as the above fomula for width(W) and gap (A) remains the same.The former changes is due to the height of metallization.
Note that all the fomula above may be used to determine the land geometry of all surface mount devices.Pls take note that careful analysis on the solder joint junction should be taken care of to ascertain that a solder pedestal can be achived.
Hope this can help.
Have a nice day.
Regards
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