We need to remember here that as printer manufacturers were enhancing their product lines, miniaturization was quickly being developed in the background. In the last 2 years I was involved in developing and conducting a D.O.E./F.M.E.A in determining Print CPK. An internal Team was identified will the first task of identifying high level root cause, then a fault tree diagram was developed to Indentify print characteristics and variables associated with the process. A very detailed set of print tests were developed and conducted. The long and the short of it is we determined that the printers themselves are extrememly accurate and repeatable, mechanically, print to print etc., it is ALL other variables that affect printing performance. Our tests indicated many short falls associated with: Operator to Operator repeatablity Paste relax and recovery (Stencil life) Under wipe solvents Handling of boards Cyber Centry coverage and equipments inability to inspect 100% of sites. (escape factors) Stencil Design Stencil cleaning between runs The highest attributor was clogging apertures in fine pitch, resistor networks, and BGA, Micro BGA areas
Obviously there was a lot more "Meat and Potatoes" to this study.. But, yes...60-70% of SMT defects are print related. As the component manufacturers continue to develop smaller and smaller footprints the challenge will remain in keeping up with technologies to support accurate and repeatable paste deposition, especially on High Mix boards with an average of 45,000+ opportunites. I remember a well known trainer and industry expert (Phil Z.) about 5 years ago stating that 95% of all SMT related defects are printer related. So we have come a long way. Scott
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