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Calcualtion of expected yeilds



Calcualtion of expected yeilds | 11 July, 2000


me again...

You know how it is, you build the boards, you look at the quality and say gee it should be better. Your boss say's it should be better...the quality engieer say' that's crap...but no one can tell you what it should be. Ok so we do quote models and so forth and you plug in a number that you would like to hit but isn't there somehting else that we can use..either via a PPM standpoint or just a manufacturing process point of view that will give a good indication of what the yeilds should be?

I'm trying to find a model or something for calculating the expected yeild for a PCBA thro' SMT wave, ATE etc and there something or do folk's have any idea's for creating a model on something like excel that we can share??? maybe even create something you can download from SMTNet

cheers guys


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Re: Calcualtion of expected yeilds | 12 July, 2000

Hi Guy's....

Was thinkng about i more this the shower actually...sometimes think I do my best work there!. So far I'm looking at stuff like integrating the DFM study to show thing's that are going to present production / process issues e.g. shadowing, short's etc..some will be subjective but I think there has to be a ranking method of some sort. I've then got to look into a pure PPM calculation for potential failure then the machine capability need's to be understood and used as a multiplier I would suggest. Another big one would be the raw card and the potential that has for thing's like bow, twist sagging and so forth..not sure how this can be figured into the equations.

there are a lot of thing's but here must be a way of generating a model that can at least give you a more accurate expected yeild than purely going on inductry averages and so forth...

come on guy's must be someone out there awake...


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