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6 technical articles »

The Effect of Higher Stencil Tension on Printing Performance

Jun 12, 2023 | Tom Meeus, Jan Van Lieshout, Hans Korsse, Sathiya Naryana

In this article we will examine if there is a measurable difference in the printing performance when using stencils which have a higher tension than is commonly accepted in the industry. Alpha's new tensoRED™ High Tension Frame System will be introduced during this wider examination. We will examine their effect in terms of controlling variation in critical deposit volumes and what, if any effect on positional accuracy can be seen....

Using Rheology Measurement As A Potentially Predictive Tool For Solder Paste Transfer Efficiency And Print Volume Consistency

Jul 02, 2020 | Mitch Holtzer, Karen Tellefsen and Westin Bent

Industry standards such as J-STD-005 and JIS Z 3284-1994 call for the use of viscosity measurement(s) as a quality assurance test method for solder paste. Almost all solder paste produced and sold use a viscosity range at a single shear rate as part of the pass-fail criteria for shipment and customer acceptance respectively. As had been reported many times, an estimated 80% of the defects associated with the surface mount technology process involve defects created during the printing process. Viscosity at a single shear rate could predict a fatal flaw in the printability of a solder paste sample. However, false positive single shear rate viscosity readings are not unknown....

Low Temperature Soldering Using SN-BI Alloys

Apr 01, 2020 | Morgana Ribas, Ph.D., Anil Kumar, Divya Kosuri, Raghu R. Rangaraju, Pritha Choudhury, Ph.D., Suresh Telu, Ph.D., Siuli Sarkar, Ph.D.

Low temperature solder alloys are preferred for the assembly of temperature-sensitive components and substrates. The alloys in this category are required to reflow between 170 and 200oC soldering temperatures. Lower soldering temperatures result in lower thermal stresses and defects, such as warping during assembly, and permit use of lower cost substrates. Sn-Bi alloys have lower melting temperatures, but some of its performance drawbacks can be seen as deterrent for its use in electronics devices.</p><p>Here we show that non-eutectic Sn-Bi alloys can be used to improve these properties and further align them with the electronics industry specific needs. The physical properties and drop shock performance of various alloys are evaluated, and their results are analysed in terms of the alloy composition, including Bi content and alloying additions....

Effect Of Voids On Thermo-Mechanical Reliability of Solder Joints

Oct 16, 2019 | Morgana Ribas, Ph.D., Siuli Sarkar, Ph.D., Carl Bilgrien, Ph.D., Tom Hunsinger - Alpha Assembly Solutions, MacDermid Performance Solutions

Despite being a continuous subject of discussion, the existence of voids and their effect on solder joint reliability has always been controversial. In this work we revisit previous works on the various types of voids, their origins and their effect on thermo-mechanical properties of solder joints. We focus on macro voids, intermetallics micro voids, and shrinkage voids, which result from solder paste and alloy characteristics. We compare results from the literature to our own experimental data, and use fatigue-crack initiation and propagation theory to support our findings. Through a series of examples, we show that size and location of macro voids are not the primary factor affecting solder joint mechanical and thermal fatigue life. Indeed, we observe that when these voids area conforms to the IPC-A-610 (D or F) or IPC-7095A standards, macro voids do not have any significant effect on thermal cycling or drop shock performance....

Novel Approach to Void Reduction Using Microflux Coated Solder Preforms for QFN/BTC Packages that Generate Heat

Aug 07, 2019 | Anna Lifton, Paul Salerno, Jerry Sidone, Oskar Khasalev

The requirement to reconsider traditional soldering methods is becoming more relevant as the demand for bottom terminated components (QFN/BTC) increases. Thermal pads under said components are designed to enhance the thermal and electrical performance of the component and ultimately allow the component to run more efficiently. Additionally, low voiding is important in decreasing the current path of the circuit to maximize high speed and RF performances. The demand to develop smaller, more reliable, packages has seen voiding requirements decrease below 15 percent and in some instances, below 10 percent.</p><p>Earlier work has demonstrated the use of micro-fluxed solder preforms as a mechanism to reduce voiding. The current work builds upon these results to focus on developing an engineered approach to void reduction in leadless components (QFN) through increasing understanding of how processing parameters and a use of custom designed micro-fluxed preforms interact. Leveraging the use of a micro-fluxed solder preform in conjunction with low voiding solder paste, stencil design, and application knowhow are critical factors in determining voiding in QFN packages. The study presented seeks to understand the vectors that can contribute to voiding such as PCB pad finish, reflow profile, reflow atmosphere, via configuration, and ultimately solder design.</p><p>A collaboration between three companies consisting of solder materials supplier, a power semiconductor supplier, and an electronic assembly manufacturer worked together for an in-depth study into the effectiveness of solder preforms at reducing voiding under some of the most prevalent bottom terminated components packages. The effects of factors such as thermal pad size, finish on PCB, preform types, stencil design, reflow profile and atmosphere, have been evaluated using lead-free SAC305 low voiding solder paste and micro-fluxed preforms. Design and manufacturing rules developed from this work will be discussed....

Divergence in Test Results Using IPC Standard SIR and Ionic Contamination Measurements

Jul 13, 2017 | K. Tellefsen, M. Holtzer, T. Cucu, M. Liberatore, M. Schmidt - Alpha Assembly Solutions, S. Moser, L. Henneken, P. Eckold, U. Welzel, R. Fritsch, D. Schlenker - Robert Bosch GmbH

Controlled humidity and temperature controlled surface insulation resistance (SIR) measurements of flux covered test vehicles, subject to a direct current (D.C.) bias voltage are recognized by a number of global standards organizations as the preferred method to determine if no clean solder paste and wave soldering flux residues are suitable for reliable electronic assemblies. The IPC, Japanese Industry Standard (JIS), Deutsches Institut fur Normung (DIN) and International Electrical Commission (IEC) all have industry reviewed standards using similar variations of this measurement. (...)

This study will compare the results from testing two solder pastes using the IPC-J-STD-004B, IPC TM-650 surface insulation resistance test, and IPC TM-650 2.3.25 in an attempt to investigate the correlation of ROSE methods as predictors of electronic assembly electrical reliability....

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