The market for high-layer-count printed circuit boards (PCB) containing blind and buried vias was once relatively small, and focused on specialized applications in the military and high end computing. The demand for these types of PCBs today is being driven by an increasing number of commercial applications in the telecommunications and semiconductor test market segments. These applications typically require high-aspect-ratio plated-through-holes (PTHs) and blind and buried vias in order to meet the applications interconnect density requirements. Blind and buried vias and high aspect ratio PTHs continue to present manufacturing challenges and frequently are the limiting features to achieving high fabrication yield. Multiple lamination cycles, the indeterminate yield of sub-cores, backdrilling and extended plating times add to the overall poor yield of high layer count PCBs. An attractive solution to the high-aspect-ratio PTH dilemma is to break the high-layer-count PCB into a number of subassemblies that can be 100% inspected and then be interconnected...
by: Michael Matthews, Ken Holcomb, Jim Haley, Catherine Shearer; Ormet Circuits, Inc.
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