Electronics Forum | Sun May 24 21:12:59 EDT 2009 | keith78
I have a problem recently to qualify QFN package on solder joint reliability. The pcb thickness stated in IPC-9701 is 2.35mm but from the in-house test, QFN surface mount on 2.35mm thickness PCB board have a short cycle to failure due to higher CTE m
Electronics Forum | Sat Nov 03 09:29:17 EDT 2007 | davef
IPC-9701, SMT Solder Joint Reliability Qualification and Performance Standard is an update of D-279, Design Guidelines For Reliable SMT PCA that includes BGA and PbFree
Association Connecting Electronics Industries (IPC)
Industry News | 2012-03-29 18:55:00.0
Providing convenient and cost-effective staff development, IPC announces its 2012 spring webinars for April, May and June. Each one-hour webinar is focused on technical challenges facing the electronics manufacturing industry, offering companies a great opportunity to bring IPC technical information to a large number of employees at one time.
Technical Library | 2023-01-17 17:22:28.0
The impact of voiding on the solder joint integrity of ball grid arrays (BGAs)/chip scale packages (CSPs) can be a topic of lengthy and energetic discussion. Detailed industry investigations have shown that voids have little effect on solder joint integrity unless they fall into specific location/geometry configurations. These investigations have focused on thermal cycle testing at 0°C-100°C, which is typically used to evaluate commercial electronic products. This paper documents an investigation to determine the impact of voids in BGA and CSP components using thermal cycle testing (-55°C to +125°C) in accordance with the IPC- 9701 specification for tin/lead solder alloys. This temperature range is more typical of military and other high performance product use environments. A proposed BGA void requirement revision for the IPC-JSTD-001 specification will be extracted from the results analysis.
Technical Library | 2015-01-05 17:38:26.0
The impact of voiding on the solder joint integrity of ball grid arrays (BGAs)/chip scale packages (CSPs) can be a topic of lengthy and energetic discussion. Detailed industry investigations have shown that voids have little effect on solder joint integrity unless they fall into specific location/geometry configurations. These investigations have focused on thermal cycle testing at 0°C-100°C, which is typically used to evaluate commercial electronic products. This paper documents an investigation to determine the impact of voids in BGA and CSP components using thermal cycle testing (-55°C to +125°C) in accordance with the IPC-9701 specification for tin/lead solder alloys. This temperature range is more typical of military and other high performance product use environments. A proposed BGA void requirement revision for the IPC-JSTD-001 specification will be extracted from the results analysis.
