Electronics Forum | Fri Jun 29 18:43:16 EDT 2001 | procon
Dear Danial, The only stupid thought is the one left only as a thought and not asked. The size of the board and the placement of the BGA on the board could play a big factor during reflow. If you are processing boards on an edge conveyor and the boa
Electronics Forum | Tue Jun 26 16:43:19 EDT 2001 | CPI
Yes a 6 mil solder deposite will reduce to approx 50% of it's original size. Does this happen on only 1 BGA? Is the BGA that its happening on have smaller balls than the others, what I'm getting to is, are you sure you are depositing the proper amo
Industry News | 2009-04-23 20:54:01.0
MINNEAPOLIS, MN � The SMTA is pleased to announce its latest technical event in Penang, Malaysia. The SMTA South East Asia Technical Conference on Electronics Assembly Technologies will be held November 19-20, 2009 at the Equatorial Hotel in Penang, Malaysia. Presentations are currently being solicited for the following key technology tracks:
Industry News | 2013-06-26 09:09:19.0
The SMTA announced Harald Grumm from Christian Koenen GmbH as the recipient of the Best of Conference Award for his presentation “The Potential of Stencil Technology – Choosing the Right Stencil Options to Maximize Yield and Earnings” at the 9th Annual International Conference on Soldering and Reliability, held May 14-17, 2013 at the Sheraton Toronto Airport, Ontario, Canada.
Technical Library | 2024-06-23 22:03:59.0
The melting temperatures of most lead-free solder alloys are somewhat higher than that of eutectic Sn/Pb solder, and many of the alloys tend to wet typical contact pads less readily. This tends to narrow down the fluxing and mass reflow process windows for assembly onto typical organic substrates and may enhance requirements on placement accuracy. Flip chip assembly here poses some unique challenges. The small dimensions provide for particular sensitivities to wetting and solder joint collapse, and underfilling does not reduce the demands on the intermetallic bond strength. Rather, the need to underfill lead to additional concerns in terms of underfill process control and reliability. Relatively little can here be learned from work on regular SMT components, BGAs or CSPs.
Technical Library | 2020-08-27 01:22:45.0
Initially adopted internal specifications for acceptance of printed circuit boards (PCBs) used for wire bonding was that there were no nodules or scratches allowed on the wirebond pads when inspected under 20X magnification. The nodules and scratches were not defined by measurable dimensions and were considered to be unacceptable if there was any sign of a visual blemish on wire-bondable features. Analysis of the yield at a PCB manufacturer monitored monthly for over two years indicated that the target yield could not be achieved, and the main reasons for yield loss were due to nodules and scratches on the wirebonding pads. The PCB manufacturer attempted to eliminate nodules and scratches. First, a light-scrubbing step was added after electroless copper plating to remove any co-deposited fine particles that acted as a seed for nodules at the time of copper plating. Then, the electrolytic copper plating tank was emptied, fully cleaned, and filtered to eliminate the possibility of co-deposited particles in the electroplating process. Both actions greatly reduced the density of the nodules but did not fully eliminate them. Even though there was only one nodule on any wire-bonding pad, the board was still considered a reject. To reduce scratches on wirebonding pads, the PCB manufacturer utilized foam trays after routing the boards so that they did not make direct contact with other boards. This action significantly reduced the scratches on wire-bonding pads, even though some isolated scratches still appeared from time to time, which caused the boards to be rejected. Even with these significant improvements, the target yield remained unachievable. Another approach was then taken to consider if wire bonding could be successfully performed over nodules and scratches and if there was a dimensional threshold where wire bonding could be successful. A gold ball bonding process called either stand-off-stitch bonding (SSB) or ball-stitch-on-ball bonding (BSOB) was used to determine the effects of nodules and scratches on wire bonds. The dimension of nodules, including height, and the size of scratches, including width, were measured before wire bonding. Wire bonding was then performed directly on various sizes of nodules and scratches on the bonding pad, and the evaluation of wire bonds was conducted using wire pull tests before and after reliability testing. Based on the results of the wire-bonding evaluation, the internal specification for nodules and scratches for wirebondable PCBs was modified to allow nodules and scratches with a certain height and a width limitation compared to initially adopted internal specifications of no nodules and no scratches. Such an approach resulted in improved yield at the PCB manufacturer.
ORION Industries | http://orionindustries.com/pdfs/SILPAD900S.pdf
Gap Pad? 1500 Sil-Pad® 900S High Performance Insulator for Low Pressure Applications The Bergquist Company The Bergquist Company-Europe The Bergquist Company-Asia North American Headquarterss Bramenberg 9a 9F-1, No
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