Electronics Forum | Tue Jul 03 16:58:27 EDT 2001 | bzark
Any opinion/spec/study on acceptability based on size and location of void in chip cap/res (e.g 0402) solder joints?
Electronics Forum | Mon Jan 17 13:09:12 EST 2000 | Dennis _F
We seem to have voids show up in one out of 5 BGAs during x-ray inspection. The x-ray is set up to accept the joint with anything less then 30% void area. I need anyones input of what during the process we can do to decrease the voiding and/or a good
Electronics Forum | Wed Jan 15 23:32:36 EST 2003 | tinson
How about section 12.2.12 of IPC-A-610C? It doesn't include detailed description of root cause/effect but acceptance criteria.
Electronics Forum | Thu Jan 16 04:02:18 EST 2003 | johnw
The IPC 610 actally conflict's with 7095 which give's a better indication of what's acceptable. I believe that IPC are reviewing both. Motorola did a bunch of work before basically showing that void's aren't that bad up to a certain size, I think pro
Electronics Forum | Sun Aug 19 15:34:20 EDT 2007 | davef
What are you trying to do: * Improve hole fill? * Reduce PTH voiding? Hole fill: Search the fine SMTnet Archives for stuff like: http://www.smtnet.com/forums/Index.cfm?CFApp=1&Message_ID=36063 PTH voiding: Ideally, there are no voids. We're unawar
Electronics Forum | Mon Jan 17 18:36:26 EST 2000 | William
Voids can be acceptable @ 24% per 5 balls area, and 8% per single ball area. In fact, Proceeding Book 1996; Vol. I, Page #126 conclusions saids: that solder joint voiding at the maximun levels pbserved in this study (were voided area was up to 24 per
Electronics Forum | Tue Mar 06 14:10:52 EST 2001 | CAL
Are the voids in the balls of a BGA? Are you verifying this through x-ray if they are? some voids depending on size and location are some what accepted. Solder paste type? Solder paste date code? Humidity high? PCB's been stored in a truck trailer?
Electronics Forum | Mon Mar 12 09:55:55 EDT 2007 | coop
I am aware of the IPC A-610 standards on acceptability of electronics, but this place builds our products to an even higher standard. the problem is on the two leading corners of the IC's as they go into the wave.
Electronics Forum | Tue Mar 06 09:18:33 EST 2001 | davef
Two things: 1 Go to IPC and buy "TP-1115 - Selection & Implementation Strategy for A Low-Residue No-Clean Process - Provides direction to electronics manufacturers interested in adopting low residue (LR) assembly technology. It addresses the concern
Electronics Forum | Thu Apr 17 13:35:49 EDT 2003 | davef
A-610 talks to acceptable voiding.
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