Electronics Forum | Wed Feb 05 10:51:17 EST 2003 | bradlanger
Thanks for responding. Do you think I could have my oven profile too aggressive
Electronics Forum | Wed Feb 05 09:11:05 EST 2003 | davef
Here is some talk about MLC capacitor flex cracking...what happens with depanelizing: http://www.kemet.com/KEMET/web/homepage/kechome.nsf/vapubfiles/f2106/$file/f2106.pdf Here are some other files on breaking capacitors: http://www.avxcorp.com/doc
Electronics Forum | Fri Feb 28 10:02:39 EST 2003 | bradlanger
Thanks for all the input on this thread. My company bought an FKN depanalizer and that solved our problem. I am also working with our design engineers on laying out the boards without the caps near the edges.
Electronics Forum | Fri Feb 28 16:23:39 EST 2003 | genny
If you can't get rid of all caps near the edges, don't forget Neil's advice above regarding parallel vs. perpendicular. I have seen a 90 degree rotation make a huge improvement in the reliability of some caps.
Electronics Forum | Mon Feb 24 19:16:38 EST 2003 | Neil
Brad, This is a common problem and may relate to the design of the board. In all cases when a device such as a capacitor is place near the edge of the board and the board must be de-panelled, the capacitor must be parallel to the break line. If the
Electronics Forum | Tue Feb 04 14:05:10 EST 2003 | bradlanger
I am haveing some trouble with ceramic capacitors breaking on a couple of boards I am running. The boards I have trouble with are in a 6 up and 12 up array and the caps are near the score lines where the individual boards are broken apart. Has anybod
Electronics Forum | Wed Feb 05 12:14:55 EST 2003 | slthomas
Increasing the score depth enough to make manual depaneling safe may very well make the panel useless, depending on your automated processes and handling requirements and methods. We use depanelers daily, hourly, even. We prefer to route the boards
Electronics Forum | Wed Feb 05 05:29:33 EST 2003 | Rajinder Sharma
If you are facing problem of craked capacitor only after breaking of the panel into individual PCB's, this may be due to stress being generated on the capacitors terminals. The stress may be due excess pressure being applied on the panel for breaking
Electronics Forum | Wed Jul 10 04:53:47 EDT 2002 | redmary
a leakage exists in the capacitor net (1206), which cause the voltage down so much. the process flow is: printing-placement-reflow-hand load-wave-depanel-FT. I find possible stress maybe exists in the depanel stage, does the extra stress cause the ca
Electronics Forum | Tue Feb 04 15:45:16 EST 2003 | adlsmt
If you are physically breaking the boards apart and not using a depanelizer you will always have this problem. I have a machine shop that can make you one for about $3,000.00. You can buy one for around $5K new. Cab,FKN and some others make them. Be
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