Electronics Forum: chip resistor cracking (Page 1 of 41)

Contamination under chip resistor array

Electronics Forum | Thu Aug 21 08:15:07 EDT 2008 | naynayno

Thanks Dave, I will be sticking with Manufacturing Engineering. These are good guidelines but what is standard clearance for various packages? This is a dimension we usually seek by eye, whether we will have a problem or not. We use straight DI -

Contamination under chip resistor array

Electronics Forum | Wed Aug 20 17:05:42 EDT 2008 | naynayno

We have experienced contamination under flat chip arrays. The lab report is still open but it appears to be dendrite growth. We have been trouble-shooting our process and cleaning equipment. My question is are there any specific design or best p

Contamination under chip resistor array

Electronics Forum | Thu Aug 21 08:33:09 EDT 2008 | davef

There is no standard as such. It's easy to see why. It's too complicated and has such a small payoff. Standoff is comprised of: * Package height * Solder thickness between the pad and the component lead * Delta of pad thickness and solder mask For p

Contamination under chip resistor array

Electronics Forum | Wed Aug 20 20:10:30 EDT 2008 | davef

Naw, accounting is boring. Standoff could be an issue. Coupla things: * Above 30 thou, just about any cleaning process, more sophisticated than a garden hose, will produce acceptable results * Below 10 thou, can be cleaned with best efforts, but not

Discrete, SMT, chip device cracking

Electronics Forum | Thu Mar 26 11:25:21 EST 1998 | Earl Moon

In December and January (1997 & 1998) a number of people requested information regarding component cracking. I overlooked this until recently thinking design and process requirements were violated. After reviewing the last 14 months consulting effort

Baking of Thick film resistor chip required

Electronics Forum | Thu Apr 27 02:39:50 EDT 2017 | ajaytyagi

Thanks for sharing your experience. I have similar view too.

Baking of Thick film resistor chip required

Electronics Forum | Wed Apr 26 06:09:12 EDT 2017 | ajaytyagi

Hi, Pl let me know about opinion/experience whether thick film chip SMD resistor which is MSL-1 Required to bake before being usedon SMT line. I want to use SMD resistance spool which is around 2 yeasr old kept at 25 deg room temperature at around 4

Baking of Thick film resistor chip required

Electronics Forum | Wed Apr 26 08:13:47 EDT 2017 | spoiltforchoice

MSL 1 is unlimited factory floor time before reflow. I have spools that are 10+ years old and haven't encountered any issues using those parts. It goes without saying those parts are not exactly used in volume so its not a massive sample but that is

2010&2512 cracking

Electronics Forum | Tue Feb 16 12:44:05 EST 2010 | esoderberg

95%+ of my boards are small and therefore are panelized using the V-score technique. Getting a lot of resistor cracking even though the resistor is layed out to be perpendicular to the long board edge. What dimension should be used from the board e

2010&2512 cracking

Electronics Forum | Tue Feb 23 09:48:26 EST 2010 | dyoungquist

How are you sepatating your boards out of the panel? If you are flexing them to break the V-score, this could be what is causing the resistors to crack.

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