Electronics Forum: defect reference (Page 1 of 10)

Tombstone defect

Electronics Forum | Wed May 21 12:55:35 EDT 2003 | Zhenya

Several things for your reference: 1. Starting with data collection: - Have you done a measle chart to illustrate the pattern of the defect? - Have you checked the corelation between shift/time and defects rate? - How about a pareto chart? - Do

TOMBSTONE defect Redution suggestion.

Electronics Forum | Sun Sep 06 03:24:31 EDT 2020 | rsatmech

Hi All, We are frequently getting tombstone in an induction component. (0102) There is no paste offset or placement offset. PCB pad design is not as per recommendation. Stencil opening is 1:1 Same part used in two locations and both the locati

AOI for defect detection at soldering process

Electronics Forum | Wed Apr 19 04:38:49 EDT 2006 | ge_lim

Hi Refering to the Apr edition of SMT , page 24 to 29, anyone got experience on implementing the AOI or 3D x ray : a) What is the pros and cons? b) What is the trend in the PCBA industry for wave soldering inspection? c) Will this implementation co

Parylene coating - spots defect around via holes & other flat surface

Electronics Forum | Fri Oct 07 08:48:45 EDT 2016 | davef

Two things ... A friend in the contract coating business said: "... the board is not being baked out long enough, 30 min is certainly not long enough depending on how many layers this board is, as the vacuum (from the parylene process) is pulling t

Lead Free Defects

Electronics Forum | Mon Jun 21 12:36:13 EDT 1999 | Bob Willis

I am trying to compile a lead free soldering defect reference source if any one is doing trials. I would like to swap defect stories and photos. Look forward to hearing from any one.

IPC/JEDEC standard for solder paste printing defects

Electronics Forum | Wed Mar 23 05:17:23 EDT 2011 | arwankhoiruddin

Hi All. I want to know what is the IPC/JEDEC standard for solder paste printing defects. From the brochures of SPI Machines, the recognized defects are excessive, insufficient, misalignment, no solder, bridging, and solder shape error. What document

SPC on SMT

Electronics Forum | Tue Nov 20 12:21:02 EST 2001 | mparker

First, determine a standard to follow. IPC/EIA J-STD-001C "Requirements for Soldered Electrical and Electronic Assemblies" is most current for electronic assemblies. Second, by your customers spec. determine which class of the standard to apply. Use

Black Barrel - Wave solder defects

Electronics Forum | Tue Aug 24 15:11:32 EDT 2010 | sjohnson

We are experiencing a high incidence of what we call "black barrel" (to differentiate from black pad) with multiple contract manufacturers and PCB vendors. The PCBs are ENIG and during wave solder (SACX-0307) multiple thru-hole components are seeing

Black Tar on ENIG

Electronics Forum | Mon Oct 20 21:26:57 EDT 2014 | richardciccarone

I have seen a couple of references to Black Tar, Not Black Pad. Apparently, it occurs only on the solder side of PTH's after wave solder and primarily on the edges of the land. It is characterized by a black coloration (Not Ni corrosion?) and non-wet

BGA CORNER WARP

Electronics Forum | Mon May 28 17:43:33 EDT 2001 | davef

Does this device have a integral heat sink / metal slug on top, like a TI TM320C6XXX er a Altera EP20K4XX? Compare the size of the pads on the interposer and the board. Compare the type solder mask [NSMD vs SMD] on the interposer and the board. Wh

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