Electronics Forum: exposed copper osp (Page 1 of 24)

to seal exposed copper layers

Electronics Forum | Fri Oct 20 14:13:32 EDT 2000 | DENNIS XIONG

Dear all, We have a PCB design mistake that causes exposed copper layers on the edges of breakaway locations. Although we fixed the design, but we already made a lot of boards plus many made before we found the problem. I wonder if any one have some

osp finish

Electronics Forum | Thu Jan 22 08:48:42 EST 2004 | patrickbruneel

Kris, You will need to change your probes to "bite" into the surface twisting probes specialy designed for copper surfaces. The surface hardness of copper is a lot higher compared to tin. link to article from osp manufacturer (see page 5) http://www

osp finish

Electronics Forum | Wed Jan 21 16:55:22 EST 2004 | patrickbruneel

Hi, Are you testing bare boards or soldered boards. Are the test probes in contact with soldered pads or contacting the copper with the osp coating (not soldered). If you could clarify this it would be easier to give some hints for probable causes.

osp finish

Electronics Forum | Wed Jan 21 17:43:04 EST 2004 | Kris

Hi, I had the same question. In our case we are contacting the copper with the osp coating (not soldered). any published reports that we can reference Thanks

osp finish

Electronics Forum | Thu Jan 22 09:21:45 EST 2004 | davef

Oh, another thing, we do not like to probe copper. It's hard, compared to solder, and beats-up the probes too much. [As Patrick Bruneel states in this thread.] Consider reflowing paste on your test pads.

Re: to seal exposed copper layers

Electronics Forum | Sat Oct 21 03:55:14 EDT 2000 | DL

Dennis, I've seen this before, and in our case we didn't need to seal the edges because there was no concern of shorting or anything in the end product, this is a choice you will have to make, Does your end product have any protrusions or mounting h

Re: Where can I purchase a PCB with a bare copper grid for solder flux evaluations.

Electronics Forum | Mon Aug 30 16:10:10 EDT 1999 | Dave F

| I have looked through the IPC web page and surfed to frustration. Can somebody give me a lead? | Brian: We don't use an etched board. We use a special stencil, described below and print on bare copper laminate. 3 Solder Wetting Test. Recogniz

PbF PCB finish

Electronics Forum | Mon Feb 05 07:02:11 EST 2007 | CL

ASIR, Findings for us so far: OSP- has worked well for us for single sided boards only. We have seen problems with using it on double sided reflow applications. Also, some customers have specified OSP, but are intolerant of exposed copper. Limited

OSP vs HASL

Electronics Forum | Mon May 14 17:12:20 EDT 2001 | davef

Continuing along the path that Brian took ... IPC-7525 gives design guideline for stepped stencils. It goes something like: * Stepped area SB GT 25 thou from pads located on the greatest thickness of the stencil * Pads in stepped area SB GT 35 tho

Washing OSP PCB's

Electronics Forum | Thu Oct 14 16:38:29 EDT 2021 | SMTA-64387687

OSP is there to keep the copper from oxidizing. Once you wash the board, the copper is exposed. So, you have to either use it right away, or store it in a non-oxygen environment (vacuum/nitrogen).

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