Electronics Forum | Thu Apr 23 15:46:08 EDT 2009 | ccross
During initial profiling we shoot for 15% or less voiding on our BGAs. During production runs we consider voids under 15% to be ok. Voiding between 15%-25% we string tag and pay more attention to during test. Over 25% we consider a reject.
Electronics Forum | Mon Jan 17 13:09:12 EST 2000 | Dennis _F
We seem to have voids show up in one out of 5 BGAs during x-ray inspection. The x-ray is set up to accept the joint with anything less then 30% void area. I need anyones input of what during the process we can do to decrease the voiding and/or a good
Electronics Forum | Mon Apr 27 19:31:12 EDT 2009 | stevek
Remember that the 25% is a reduction in cross sectional area. A void in the middle of the ball that reduces the cross sectional area by 25% is about half the diameter of the ball. If it is closer to either termination, the corresponding size would
Electronics Forum | Mon Jan 17 21:01:21 EST 2000 | Dave F
Dennis: On your BGAs: * Never seen voids any place other than the top ... lower density stuff rises. * Our spec on voids says: 1 Voids 1a Voids in soldered balls shall be less than 20% of the diameter of the solder ball. 1b No void shall sho
Electronics Forum | Mon Mar 12 11:27:35 EDT 2007 | coop
I am not using a solder pallet, I don't think the problem is contamination related, because these parts are on some of our other assemblies, and they're being waved with no problems. The problem seems to be mainly on our panelized boards for some rea
Electronics Forum | Thu Jan 15 09:40:47 EST 2004 | davef
Search the fine SMTnet Archives. For instance: http://www.smtnet.com/forums/Index.cfm?CFApp=1&Message_ID=24429 Do not get your hopes up about finding something to support your "leaching out of silver theory", though. * AgxSn IMC are disbursed ro
Electronics Forum | Mon May 06 06:22:39 EDT 2019 | SMTA-Rogers
Hello! Do you have a better stencil design to reduce the large area of solder joint voids? Or is there a suggested way to set the reflow profile? Or are there other process improvements to make the solder joint at the LED pad less than 10% per void?
Electronics Forum | Thu May 30 09:33:15 EDT 2019 | emeto
Contributors in order of importance: 1. PCB design - if you have large thermal pads, a grid of via holes should be created. Components with low profile will not let the gas to escape from the joint. The only way is going down. 2. Reduce paste volum
Electronics Forum | Tue May 28 18:31:08 EDT 2019 | jlawson
Solder paste flux is main contributor, Lead termination chemical-oxide by products and PCB Plating-Chemicals. Reflow profile would have very limited if not no impact really unless is way off. Paste volume control and Stencil design plays a big part
Electronics Forum | Wed Aug 22 20:18:17 EDT 2001 | mcox
I can send you a DOE I did on WS vs NC on BGA�s, but the results were.. NC = Had significantly less voiding both in number of voids and size of voids. A longer soak time (reflow oven) resulted in less voiding both for NC and WS. Mike
