Electronics Forum | Thu Jun 02 22:40:13 EDT 2016 | slouis2014
Hi, yes have a few experiments initially i tried to increase the solder volume but component pin have insufficient solder. 1. The solder coverage do you calculate it by solder volume or solder area. 2. if i would achieve as you recommend 50-60 % woul
Electronics Forum | Mon Oct 07 09:05:41 EDT 2002 | russ
thnaks everyone for the the input. I have been noticing that a lot of comments are referring to 230 deg. C and such. has something changed in the industry lately? It has been to my knowledge previously to peak the reflow at 215 or so. I have many B
Electronics Forum | Thu May 20 14:38:09 EDT 2010 | davef
Unfilled vias consistently produce higher quantities and larger voids than filled vias, in some cases 5 times as much. [Effect of Filling Via-in-Pad on Voiding Rates in PWB Assembly for BGA Components; C Shea, R Raut, L Piccione; ALPHA -A Cookson Ele
Electronics Forum | Fri Sep 03 06:53:38 EDT 2010 | arjan
Yes, we assembled a lot of QFN in the last years, but we don't have a X-ray machine by ourself, so we cant't inspect each device. This type LGA was designed on a prototyping board of our customer so we would validate our LGA reflow process and a rese
Electronics Forum | Tue May 08 22:34:53 EDT 2007 | davef
Do you mean "how to solve or reduce this defect at wave soldering process" while continuing to use-up my SACX solder? If so, try: * Smaller solder volumes lower shrinkage hole / hot tears [Higher hole diameter versus pin diameter helps in reducing v
Electronics Forum | Mon Feb 03 16:26:30 EST 2020 | stephendo
A few lifetimes ago I went to a seminar on reflow profiles. The speaker emphasized more than once that the cool down rate is important. Someone asked him about controlling the cool down rate and he acknowledged that you can't. And IIRC it was an ove
Electronics Forum | Mon Aug 30 06:47:18 EDT 2010 | arjan
We having issues installing the Linear Tech LTM8023. We have different soldering results in our PBfree testruns. The voiding and solderball rate is not stable (random positions and sizes). The pcb's (gold finish)are prebaked, the LGA's are stored in
Electronics Forum | Thu Nov 21 06:36:30 EST 2002 | Ben
I'm doing SMT of lead-free solder BGA on FR4 Ni-Au PCB. The solder paste I'm using is Sn/Ag/Cu and reflow with peak temp at 240C. I found there are voids(1-2) in almost every solder joint(500 micron in dia) under xray. And the void size is violate th
Electronics Forum | Mon Nov 26 13:40:40 EST 2018 | robl
Hi Prem, Yes, the flux in the Cobar paste helped with wetting and joint strength, as does reducing voids as there is more solder in the joint, as does cooling rate. Regarding peel test in KG, it depends on the pad size and volume of solder in the j
Electronics Forum | Wed Mar 15 08:18:29 EDT 2017 | rob
It's well documented in higher power semiconductors where thermal interface materials are used, such as SIL pads, thermal grease etc. There are a couple of papers on the effects of voiding on MOSFET performance, but I haven't got around to reading
