Technical Library: aperture design (Page 1 of 2)

Stencil Printing 008004/0201 Aperture Components

Technical Library | 2020-04-14 15:56:32.0

This paper will focus on the application requirements of solder printing small aperture designs, concentrating on 008004 (inch) / 0201 (metric) size components, and the results of a design of experiment printing these challenging apertures. As Moore's law continues to be applied to component miniaturization, the next installment of reduced packaging has arrived in the form of the 008004/0201 for resistors and capacitors. Component size roughly the size of a grain of sand presents specific challenges to the solder printing process. To address these challenges, each aspect of the printing process will need be examined. This includes essential machine requirements, including correct squeegee blades, tooling support, and calibrations, to meet the demanding specifications. The correct match and design of materials will be addressed, focusing on the stencil and substrate design along with solder paste and cleaning solvent requirements. A design of experiment will be reviewed that applies the machine and materials discussed, including the printer and Solder Paste Inspection (SPI) setup and the specific machine parameters used. The results of these DOE's will then be closely examined.

ITW EAE

Step Stencil design when 01005 and 0.3mm pitch uBGA's coexist with RF Shields

Technical Library | 2023-07-25 16:50:02.0

Some of the new handheld communication devices offer real challenges to the paste printing process. Normally, there are very small devices like 01005 chip components as well as 0.3 mm pitch uBGA along with other devices that require higher deposits of solder paste. Surface mount connectors or RF shields with coplanarity issues fall into this category. Aperture sizes for the small devices require a stencil thickness in the 50 to 75 um (2-3 mils) range for effective paste transfer whereas the RF shield and SMT connector would like at least 150 um (6 mils) paste height. Spacing is too small to use normal step stencils. This paper will explore a different type of step stencil for this application; a "Two-Print Stencil Process" step stencil. Here is a brief description of a "Two-Print Stencil Process". A 50 to 75 um (2-3 mils) stencil is used to print solder paste for the 01005, 0.3 mm pitch uBGA and other fine pitch components. While this paste is still wet a second in-line stencil printer is used to print all other components using a second thicker stencil. This second stencil has relief pockets on the contact side of the stencil any paste was printed with the first stencil. Design guidelines for minimum keep-out distances between the relief step, the fine pitch apertures, and the RF Shields apertures as well relief pocket height clearance of the paste printed by the first print stencil will be provided.

Photo Stencil LLC

SMT Stencil, Surface Performance Returning to Basics in the SMT Screen Printing Process to Significantly Improve the Paste Deposition

Technical Library | 2018-03-15 07:23:35.0

The SMT assembly process is continuously challenged by the factors which enhance circuit board performance and limit productivity. The pick and place and reflow systems reflect these driven issues by adding more and more controls to their systems, but the fact is one of the age old processes continues to operate within the same rules since the dawn of the SMT assembly world: The SMT screen printing. (...)This paper showcases a new stencil process that was discovered by reverting to the basics:understanding the reason for each stencil material process, focusing on detailed finishes and a disciplined aperture design process, maintaining original designs, and making the correctly designed apertures to control the paste deposition. The test results drove us to focus the efforts on the aperture walls In this paper we will demonstrate with lab tests SMT process results howthe improved paste release results in improved SMT print process performance and its positive impact on SPI yields and EOL performance.

InterLatin

A Study to Determine the Impact of Solder Powder Mesh Size and Stencil Technology Advancement on Deposition Volume when Printing Solder Paste

Technical Library | 2017-04-13 16:14:27.0

The drive to reduced size and increased functionality is a constant in the world of electronic devices. In order to achieve these goals, the industry has responded with ever-smaller devices and the equipment capable of handling these devices. The evolution of BGA packages and leadless devices is pushing existing technologies to the limit of current assembly techniques and materials.As smaller components make their way into the mainstream PCB assembly market, PCB assemblers are reaching the limits of Type 3 solder paste, which is currently in use by most manufacturers.The goal of this study is to determine the impact on solder volume deposition between Type 3, Type 4 and Type 5 SAC305 alloy powder in combination with stainless steel laser cut, electroformed and the emerging laser cut nano-coated stencils. Leadless QFN and μBGA components will be the focus of the test utilizing optimized aperture designs.

AIM Solder

Assessing the Effectiveness of I/O Stencil Aperture Modifications on BTC Void Reduction

Technical Library | 2018-09-26 20:33:26.0

Bottom terminated components, or BTCs, have been rapidly incorporated into PCB designs because of their low cost, small footprint and overall reliability. The combination of leadless terminations with underside ground/thermal pads have presented a multitude of challenges to PCB assemblers, including tilting, poor solder fillet formation, difficult inspection and – most notably – center pad voiding. Voids in large SMT solder joints can be difficult to predict and control due to the variety of input variables that can influence their formation. Solder paste chemistries, PCB final finishes, and reflow profiles and atmospheres have all been scrutinized, and their effects well documented. Additionally, many of the published center pad voiding studies have focused on optimizing center pad footprint and stencil aperture designs. This study focuses on I/O pad stencil modifications rather than center pad modifications. It shows a no-cost, easily implemented I/O design guideline that can be deployed to consistently and repeatedly reduce void formation on BTC-style packages.

AIM Solder

Board Design and Assembly Process Evaluation for 0201 Components on PCBs

Technical Library | 2023-05-02 19:06:43.0

As 0402 has become a common package for printed circuit board (PCB) assembly, research and development on mounting 0201 components is emerging as an important topic in the field of surface mount technology for PWB miniaturization. In this study, a test vehicle for 0201 packages was designed to investigate board design and assembly issues. Design of Experiment (DOE) was utilized, using the test vehicle, to explore the influence of key parameters in pad design, printing, pick-andplace, and reflow on the assembly process. These key parameters include printing parameters, mounting height or placement pressure, reflow ramping rate, soak time and peak temperature. The pad designs consist of rectangular pad shape, round pad shape and home-based pad shape. For each pad design, several different aperture openings on the stencil were included. The performance parameters from this experiment include solder paste height, solder paste volume and the number of post-reflow defects. By analyzing the DOE results, optimized pad designs and assembly process parameters were determined.

Flextronics International

Factors That Influence Side-Wetting Performance on IC Terminals

Technical Library | 2023-08-04 15:27:30.0

A designed experiment evaluated the influence of several variables on appearance and strength of Pb-free solder joints. Components, with leads finished with nickel-palladium-gold (NiPdAu), were used from Texas Instruments (TI) and two other integrated circuit suppliers. Pb-free solder paste used was tin-silver-copper (SnAgCu) alloy. Variables were printed wiring board (PWB) pad size/stencil aperture (the pad finish was consistent; electrolysis Ni/immersion Au), reflow atmosphere, reflow temperature, Pd thickness in the NiPdAu finish, and thermal aging. Height of solder wetting to component lead sides was measured for both ceramic plate and PWB soldering. A third response was solder joint strength; a "lead pull" test determined the maximum force needed to pull the component lead from the PWB. This paper presents a statistical analysis of the designed experiment. Reflow atmosphere and pad size/stencil aperture have the greatest contribution to the height of lead side wetting. Reflow temperature, palladium thickness, and preconditioning had very little impact on side-wetting height. For lead pull, variance in the data was relatively small and the factors tested had little impact.

Texas Instruments

Factors That Influence Side-Wetting Performance on IC Terminals

Technical Library | 2024-04-08 15:46:36.0

A designed experiment evaluated the influence of several variables on appearance and strength of Pb-free solder joints. Components, with leads finished with nickel-palladium-gold (NiPdAu), were used from Texas Instruments (TI) and two other integrated circuit suppliers. Pb-free solder paste used was tin-silver-copper (SnAgCu) alloy. Variables were printed wiring board (PWB) pad size/stencil aperture (the pad finish was consistent; electrolysis Ni/immersion Au), reflow atmosphere, reflow temperature, Pd thickness in the NiPdAu finish, and thermal aging. Height of solder wetting to component lead sides was measured for both ceramic plate and PWB soldering. A third response was solder joint strength; a "lead pull" test determined the maximum force needed to pull the component lead from the PWB. This paper presents a statistical analysis of the designed experiment. Reflow atmosphere and pad size/stencil aperture have the greatest contribution to the height of lead side wetting. Reflow temperature, palladium thickness, and preconditioning had very little impact on side-wetting height. For lead pull, variance in the data was relatively small and the factors tested had little impact.

Texas Instruments

Stencil Design Guidelines for Electronics Assembly Technologies.

Technical Library | 2014-03-13 15:25:01.0

A student competition paper at Budapest University of Technology And Economics, Department of Electronics Technology gives background, covers stencil design and discusses stencils intended for pin in paste application. The stencil applied for depositing the solder paste is a thin, 75–200 µm thick metal foil, on which apertures are formed according to the solder pads on the printed circuit board. Stencil printing provides a fast, mass solder paste deposition process; relatively expensive, appropriate and recommended for mass production.

Budapest University of Technology and Economics

An Investigation into the Use of Nano-Coated Stencils to Improve Solder Paste Printing with Small Stencil Aperture Area Ratios

Technical Library | 2017-09-28 16:36:33.0

These nano-coatings also refine the solder paste brick shape giving improved print definition. These two benefits combine to help the solder paste printing process produce an adequate amount of solder paste in the correct position on the circuit board pads. Today, stencil aperture area ratios from 0.66 down to 0.40 are commonly used and make paste printing a challenge. This paper presents data on small area ratio printing for component designs including 01005 Imperial (0402 metric) and smaller 03015 metric and 0201 metric chip components and 0.3 mm and 0.4 mm pitch micro BGAs.

FCT ASSEMBLY, INC.

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