Technical Library | 2023-07-22 02:26:05.0
Patch offset; Uneven patches throughout the substrate (each substrate is offset in a different way); Only part of the substrate is offset; Only certain components are offset; The patch Angle is offset; Component absorption error; Laser identification (component identification) error; Nozzle loading and unloading error; Mark (BOC mark, IC mark) identification error; Image recognition error (KE-2060 only); Analysis of the main reasons for throwing material. More information about KINGSUN please Contact US at jenny@ksunsmt.com or visit www.ksunsmt.com
Technical Library | 2023-09-13 13:03:25.0
SMT auto aqueous stencil cleaning machines are an essential tool for any SMT production line. These machines use a variety of methods to remove contaminants and debris from SMT stencils, which can cause defects and reliability issues.
Technical Library | 2017-07-06 15:50:17.0
Head-in-pillow (HiP) is a BGA defect which happens when solder balls and paste can't contact well during reflow soldering. Package warpage was one of the major reasons for HiP formation. In this paper, package warpage was measured and simulated. It was found that the package warpage was sensitive to the thickness of inside chips. A FEM method considering viscoelastic property of mold compound was introduced to simulate package warpage. The CTE mismatch was found contributes to more than 90% of the package warpage value when reflowing at the peak temperature. A method was introduced to measure the warpage threshold, which is the smallest warpage value that may lead to HiP. The results in different atmospheres showed that the warpage threshold was 50μm larger in N2 than that in air, suggesting that under N2 atmosphere the process window for HiP defects was larger than that under air, which agreed with the experiments.
Technical Library | 2019-10-03 14:27:01.0
Knowing how package warpage changes over temperature is a critical variable in order to assemble reliable surface mount attached technology. Component and component or component and board surfaces must stay relatively flat with one another or surface mount defects, such as head-in-pillow, open joints, bridged joints, stretched joints, etc. may occur. Initial package flatness can be affected by numerous aspects of the component manufacturing and design. However, change in shape over temperature is primarily driven by CTE mismatch between the different materials in the package. Thus material CTE is a critical factor in package design. When analyzing or modeling package warpage, one may assume that the package receives heat evenly on all sides, when in production this may not be the case. Thus, in order to understand how temperature uniformity can affect the warpage of a package, a case study of package warpage versus different heating spreads is performed.Packages used in the case study have larger form factors, so that the effect of non-uniformity can be more readily quantified within each package. Small and thin packages are less prone to issues with package temperature variation, due to the ability for the heat to conduct through the package material and make up for uneven sources of heat. Multiple packages and multiple package form factors are measured for warpage via a shadow moiré technique while being heated and cooled through reflow profiles matching real world production conditions. Heating of the package is adjusted to compare an evenly heated package to one that is heated unevenly and has poor temperature uniformity between package surfaces. The warpage is measured dynamically as the package is heated and cooled. Conclusions are drawn as to how the role of uneven temperature spread affects the package warpage.
Technical Library | 2013-01-31 18:43:15.0
There are three key industry trends that are driving the need for temperature-dependent warpage measurement: the trend toward finer-pitch devices, the emergence of lead-free processing, and changes in device form factors. Warpage measurement has become a key measurement for analysis; prevention and prediction of interconnect defects and has been employed in failure analysis labs and production sites worldwide. First published in the 2012 IPC APEX EXPO technical conference proceedings
Technical Library | 2011-06-09 13:29:17.0
Flatness measurement of electronic parts and assemblies, or PCB’s, has become increasingly critical as geometries become smaller: finer pitches, smaller solder ball volumes, thinner substrates, etc. Additionally, processing temperatures vary and can pla
Technical Library | 2021-01-13 21:34:29.0
Package-on-Package (PoP) is a popular technology for fabricating chipsets of accelerated processing units. However, the coefficient of thermal expansion mismatch between Si chips and polymer substrates induces thermal warpage during the reflow process. As such, the reflow temperature and reliability of solder joints are critical aspects of PoP. Although Sne58Bi is a good candidate for low-temperature processes, its brittleness causes other reliability issues. In this study, an in-situ observation was performed on composite solders (CSs) made of ...
Technical Library | 2014-03-06 19:04:07.0
Over the last few years, there has been an increase in the rate of Head-in-Pillow component soldering defects which interrupts the merger of the BGA/CSP component solder spheres with the molten solder paste during reflow. The issue has occurred across a broad segment of industries including consumer, telecom and military. There are many reasons for this issue such as warpage issues of the component or board, ball co-planarity issues for BGA/CSP components and non-wetting of the component based on contamination or excessive oxidation of the component coating. The issue has been found to occur not only on lead-free soldered assemblies where the increased soldering temperatures may give rise to increase component/board warpage but also on tin-lead soldered assemblies.
Technical Library | 2018-11-07 03:31:04.0
Generally speaking, there are not many cases of insufficient solder and solder short in BGA soldering, but it is not impossible. Here we discuss some elements may cause it
Technical Library | 2024-02-05 17:51:01.0
Objective: Drying = reducing the humidity in PCB before soldering Preventing delamination caused by thermal stress after moisture absorption Methods: Drying in convection and/ or vacuum oven Parameters subject to material type, soldering surface, layer count, time to soldering, layout (copper-plated areas)
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