Technical Library: dek stencil lock (Page 1 of 1)

A New Stencil Rulebook for Wafer Level Solder Ball Placement using High Accuracy Screen Printing

Technical Library | 2007-12-13 17:03:02.0

Printer-hosted processes for solder ball placement are now widely used for package technologies ranging from BGAs using ball diameters above 750μm to the latest WL-CSPs demanding 250μm diameter. This broadening spectrum of applications brings more choices in terms of stencil design rules and production methodologies.

ASM Assembly Systems (DEK)

Screen Making for Printed Electronics- Specification and Tolerancing

Technical Library | 2018-03-28 14:54:36.0

Six decades of legacy experience makes the specification and production of screens and masks to produce repeatable precision results mostly an exercise in matching engineering needs with known ink and substrate performance to specify screen and stencil characteristics. New types of functional and electronic devices, flex circuits and medical sensors, industrial printing, ever finer circuit pitch, downstream additive manufacturing processes coupled with new substrates and inks that are not optimized for the rheological, mechanical and chemical characteristics for the screen printing process are becoming a customer driven norm. Many of these materials do not work within legacy screen making, curing or press set-up parameters. Many new materials and end uses require new screen specifications.This case study presents a DOE based method to pre-test new materials to categorize ink and substrate rheology, compatibility and printed feature requirement to allow more accurate screen recipes and on-press setting expectations before the project enters the production environment where time and materials are most costly and on-press adjustment methods may be constrained by locked, documented or regulatory processes, equipment limitations and employee experience.

Hazardous Print Consulting Inc

NanoClear Coated Stencils

Technical Library | 2023-05-22 16:49:42.0

Our customers' issues • Apertures are getting smaller • Paste does not release as well • Contaminates the bottom of the stencil • Increases defects / reduces yield  Insufficient solder  Bridging  Solder balls on surface of PCB  Flux residue • Requires more frequent cleaning • Reduced efficiency (wasted time) • Increased use of consumables (cost)  USC fabric (use "cheap" fabric to reduce cost)  Lint creates more defects  Cleaning chemistries (use IPA to reduce cost)  IPA breaks down flux and can create more defects

ASM Assembly Systems (DEK)

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