Technical Library: delamination on a pcb (Page 1 of 4)

Understanding and optimizing delamination/recycling of printed circuit boards using a supercritical carbon dioxide process

Technical Library | 2024-09-02 17:01:54.0

A printed circuit board (PCB) is an integral component of any electronic product and is among the most challenging components to recycle. While PCB manufacturing processes undergo generations of innovation and advancement with 21st century technologies, the recycling of PCBs primarily employs 1920's shredding and separation technologies. There is a critical need for alternative PCB recycling routes to satisfy the increasing environmental demands. Previous work has developed an environmentally benign supercritical fluid process that successfully delaminated the PCB substrates and separated the PCB layers. While this work was successful in delamination of the PCB substrates, further understanding is needed to maximize the interactions between the supercritical fluid and PCB for an optimal processing scenario. As such, this research presents an exploratory study to further investigate the supercritical fluid PCB recycling process by using supercritical carbon dioxide and an additional amount of water to delaminate PCB substrates. The focus of this study is to test delamination success at low temperature and pressure supercritical conditions in comparison to the previous studies. Furthermore, material characterization methods, such as differential scanning calorimetry, dynamic mechanical analysis, and Fourier transform infrared spectroscopy, are included to study the delaminating mechanisms. Results from the recycling process testing showed that the PCB substrates delaminated easily and could be further separated into copper foils, glass fibers and polymers. Surprisingly, the material characterization suggested that there were no significant changes in glass transition temperature, crosslink density, and FTIR spectra of the PCBs before and after the supercritical fluid process.

Arizona State University

Moisture Measurements in PCBs and Impact of Design on Desorption Behaviour

Technical Library | 2018-09-21 10:12:53.0

Moisture accumulates during storage and industry practice recommends specific levels of baking to avoid delamination. This paper will discuss the use of capacitance measurements to follow the absorption and desorption behaviour of moisture. The PCB design used in this work, focused on the issue of baking out moisture trapped between copper planes. The PCB was designed with different densities of plated through holes and drilled holes in external copper planes, with capacitance sensors located on the inner layers. For trapped volumes between copper planes, the distance between holes proved to be critical in affecting the desorption rate. For fully saturated PCBs, the desorption time at elevated temperatures was observed to be in the order of hundreds of hours. Finite difference diffusion modelling was carried out for moisture desorption behaviour for plated through holes and drilled holes in copper planes. A meshed copper plane was also modelled evaluating its effectiveness for assisting moisture removal and decreasing bake times. Results also showed, that in certain circumstances, regions of the PCB under copper planes initially increase in moisture during baking.

National Physical Laboratory

Influence of Plating Quality on Reliability of Microvias

Technical Library | 2016-05-12 16:29:40.0

Advances in miniaturized electronic devices have led to the evolution of microvias in high density interconnect (HDI) circuit boards from single-level to stacked structures that intersect multiple HDI layers. Stacked microvias are usually filled with electroplated copper. Challenges for fabricating reliable microvias include creating strong interface between the base of the microvia and the target pad, and generating no voids in the electrodeposited copper structures. Interface delamination is the most common microvia failure due to inferior quality of electroless copper, while microvia fatigue life can be reduced by over 90% as a result of large voids, according to the authors’ finite element analysis and fatigue life prediction. This paper addresses the influence of voids on reliability of microvias, as well as the interface delamination issue.

CALCE Center for Advanced Life Cycle Engineering

The Effect of Solder Mask And Surface Mount Adhesive Types on a PCB Manufacturing Process.

Technical Library | 1999-07-21 09:04:04.0

A high volume manufacturer of printed circuit boards (PCBs) had attempted for many years to locate an adhesive that was robust enough to meet their manufacturing needs. This proved to be a challenge because they needed the adhesive to accommodate a wide range of different dispensing equipment and board designs. The two key performance criteria required from the adhesive were dispensability and adhesion...

Henkel Electronic Materials

Influence of Salt Residues on BGA Head on Pillow (Hip)

Technical Library | 2016-05-26 15:07:36.0

The oxide layers are known as wetting inhibitors in component and PCB metallizations. The oxide acts as barrier that prevent the tin diffusion from happening. Besides, in corrosion studies, the role of salt residues -with Cl ion- on some metals is known as being promoters of oxidation or corrosion. On the other hand, most of corrosion studies with tin metallization are focused mainly on the corrosion resistance of tin alloys, but little has been done respecting to the influence of salts on tin metallization wetting. In this paper, a series of experiments was carried over to know the influence of specifically NaCl on BGA wetting given Head in Pillow (HiP) as result.

Continental Corporation

Progressive Failure Analysis of Laminates with Embedded Wrinkle Defects Based on an Elastoplastic Damage Model

Technical Library | 2021-03-04 15:16:27.0

Out-of-plane wrinkling has a significant influence on the mechanical performance of composite laminates. Numerical simulations were conducted to investigate the progressive failure behavior of fiber-reinforced composite laminates with out-of-plane wrinkle defects subjected to axial compression. To describe the material degradation, a three-dimensional elastoplastic damage model with four damage modes (i.e., fiber tensile failure, matrix failure, fiber kinking/splitting, and delamination) was developed based on the LaRC05 criterion. To improve the computational efficiency in searching for the fracture angle in the matrix failure analysis, a high-efficiency and robust modified algorithm that combines the golden section search method with an inverse interpolation based on an existing study is proposed.

Jinan University

The Effects of PCB Fabrication on High-Frequency Electrical Performance

Technical Library | 2016-07-21 18:16:06.0

Achieving optimum high-frequency printed-circuit-board (PCB) performance is not simply a matter of specifying the best possible PCB material, but can be significantly impacted by PCB fabrication practices. In addition to appropriate circuit materials and circuit design configurations to meet target performance goals, a number of PCB material-related issues can affect final performance, including the use of soldermask, the PCB copper plating thickness, the conductor trapezoidal effect, and plating finish; understanding the effects of these material issues can help when fabricating high-frequency circuits for the best possible electrical performance.

Rogers Corporation

No-Clean Flux Residue and Underfill Compatibility Effects on Electrical Reliability

Technical Library | 2013-04-11 15:43:17.0

With the explosion of growth in handheld electronics devices, manufacturers have been forced to look for ways to reinforce their assemblies against the inevitable bumps and drops that their products experience in the field. One method of reinforcement has been the utilization of underfills to "glue" certain SMDs to the PCB. Bumped SMDs attached to the PCB with a no-clean soldering process offer the unavoidable scenario of the underfill coming in contact with a flux residue. This may or may not create a reliability issue... First published in the 2012 IPC APEX EXPO technical conference proceedings

Indium Corporation

Approaches to Overcome Nodules and Scratches on Wire Bondable Plating on PCBs

Technical Library | 2020-08-27 01:22:45.0

Initially adopted internal specifications for acceptance of printed circuit boards (PCBs) used for wire bonding was that there were no nodules or scratches allowed on the wirebond pads when inspected under 20X magnification. The nodules and scratches were not defined by measurable dimensions and were considered to be unacceptable if there was any sign of a visual blemish on wire-bondable features. Analysis of the yield at a PCB manufacturer monitored monthly for over two years indicated that the target yield could not be achieved, and the main reasons for yield loss were due to nodules and scratches on the wirebonding pads. The PCB manufacturer attempted to eliminate nodules and scratches. First, a light-scrubbing step was added after electroless copper plating to remove any co-deposited fine particles that acted as a seed for nodules at the time of copper plating. Then, the electrolytic copper plating tank was emptied, fully cleaned, and filtered to eliminate the possibility of co-deposited particles in the electroplating process. Both actions greatly reduced the density of the nodules but did not fully eliminate them. Even though there was only one nodule on any wire-bonding pad, the board was still considered a reject. To reduce scratches on wirebonding pads, the PCB manufacturer utilized foam trays after routing the boards so that they did not make direct contact with other boards. This action significantly reduced the scratches on wire-bonding pads, even though some isolated scratches still appeared from time to time, which caused the boards to be rejected. Even with these significant improvements, the target yield remained unachievable. Another approach was then taken to consider if wire bonding could be successfully performed over nodules and scratches and if there was a dimensional threshold where wire bonding could be successful. A gold ball bonding process called either stand-off-stitch bonding (SSB) or ball-stitch-on-ball bonding (BSOB) was used to determine the effects of nodules and scratches on wire bonds. The dimension of nodules, including height, and the size of scratches, including width, were measured before wire bonding. Wire bonding was then performed directly on various sizes of nodules and scratches on the bonding pad, and the evaluation of wire bonds was conducted using wire pull tests before and after reliability testing. Based on the results of the wire-bonding evaluation, the internal specification for nodules and scratches for wirebondable PCBs was modified to allow nodules and scratches with a certain height and a width limitation compared to initially adopted internal specifications of no nodules and no scratches. Such an approach resulted in improved yield at the PCB manufacturer.

Teledyne DALSA

Pb-Free Reflow, PCB Degradation, and the Influence of Moisture Absorption

Technical Library | 2024-09-02 17:31:09.0

The cracking and delamination of printed circuit boards (PCB) during exposure to elevated thermal exposure, such as reflow and rework, have always been a concern for the electronics industry. However, with the increasing spread of Pb-free assembly into industries with lower volume and higher complexity, the occurrence of these events is increasing in frequency. Several telecom and enterprise original equipment manufacturers (OEMs) have reported that the robustness of their PCBs is their number one concern during the transition from SnPb to Pb-free product. Cracking and delamination within PCBs can be cohesive or adhesive in nature and can occur within the weave, along the weave, or at the copper/epoxy interface (see Figure 1). The particular role of moisture absorption and other PCB material properties, such as out of plane expansion on this phenomenon is still being debated.

DfR Solutions (acquired by ANSYS Inc)

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