Technical Library | 2014-09-04 17:43:19.0
The counterfeiting of electronic components has become a major challenge in the 21st century. The electronic component supply chain has been greatly affected by widespread counterfeit incidents. A specialized service of testing, detection, and avoidance must be created to tackle the worldwide outbreak of counterfeit integrated circuits (ICs). So far, there are standards and programs in place for outlining the testing, documenting, and reporting procedures. However, there is not yet enough research addressing the detection and avoidance of such counterfeit parts. In this paper we will present, in detail, all types of counterfeits, the defects present in them, and their detection methods. We will then describe the challenges to implementing these test methods and to their effectiveness. We will present several anti-counterfeit measures to prevent this widespread counterfeiting, and we also consider the effectiveness and limitations of these anti-counterfeiting techniques.
Technical Library | 2008-05-14 15:44:58.0
This paper will review some basic past and present flux chemistries that affect flux collection methodology. It will also review some of the most common flux collection methods, self-cleaning techniques, and maintenance goals. And, finally, data will be presented from high volume production testing of an advanced flux management system.
Technical Library | 2017-03-09 17:37:05.0
This article focuses on the fabrication and characterization of stretchable interconnects for wearable electronics applications. Interconnects were screen-printed with a stretchable silver-polymer composite ink on 50-μm thick thermoplastic polyurethane. The initial sheet resistances of the manufactured interconnects were an average of 36.2 mΩ/◽, and half the manufactured samples withstood single strains of up to 74%. The strain proportionality of resistance is discussed, and a regression model is introduced. Cycling strain increased resistance. However, the resistances here were almost fully reversible, and this recovery was time-dependent. Normalized resistances to 10%, 15%, and 20% cyclic strains stabilized at 1.3, 1.4, and 1.7. We also tested the validity of our model for radio-frequency applications through characterization of a stretchable radio-frequency identification tag.
Technical Library | 2023-11-20 18:49:11.0
Non-destructive testing during the manufacture of printed wiring boards (PWBs) has become ever more important for checking product quality without compromising productivity. Using x-ray inspection, not only provides a non-destructive test but also allows investigation within optically hidden areas, such as the quality of post solder reflow of area array devices (e.g. BGAs, CSPs and flip chips). As the size of components continues to diminish, today's x-ray inspection systems must provide increased magnification, as well as better quality x-ray images to provide the necessary analytical information. This has led to a number of x-ray manufacturers offering digital x-ray inspection systems, either as standard or as an option, to satisfy these needs. This paper will review the capabilities that these digital x-ray systems offer compared to their analogue counterparts. There is also a discussion of the various types of digital x-ray systems that are available and how the use of different digital detectors influences the operational capabilities that such systems provide.
Technical Library | 2016-04-14 13:49:44.0
A system level test, usually built-in test (BIT), determines that one or more subsystems are faulty. These subsystems sent to the depot or factory repair facility, called units under test (UUTs) often pass that test, an event we call No-Fault-Found (NFF). With more-and more electronics monitored by BIT, it is more likely that an intermittent glitch will trigger a call for a maintenance action resulting in NFF. NFFs are often confused with false alarm (FA), cannot duplicate (CNDs)or retest OK (RTOK) events. NFFs at the depot are caused by FAs, CNDs, RTOKs as well as a number of other complications. Attempting to repair NFF scan waste precious resources, compromise confidence in the product, create customer dissatisfaction, and the repair quality remains a mystery. The problem is compounded by previous work showing that most failure indications calling for repair action at the system level are invalid. NFFs can be caused by real failures or may be a result of system level false alarms. Understanding the cause of the problem may help us distinguish between units under test (UUTs) that we can repair and those that we cannot. In calculating the true cost of repair we must account for wasted effort in attempting to repair unrepairable UUTs.This paper will shed some light on this trade-off. Finally, we will explore approaches for dealing with the NFF issue in a cost effective manner.
Technical Library | 2013-03-27 23:43:40.0
Vapor phase, once cast to the annals’ of history is making a comeback. Why? Reflow technology is well developed and has served the industry for many years, it is simple and it is consistent. All points are true – when dealing with the centre section of the bell curve. Today’s PCB manufacturers are faced with many designs which no longer fall into that polite category but rather test the process engineering groups with heavier and larger panels, large ground planes located in tricky places, component mass densities which are poorly distributed, ever changing Pb Free alloys and higher process temperatures. All the time the costs for the panels increase, availability of “process trial” boards diminishes and yields are expected to be extremely high with zero scrap rates. The final process in the assembly line has the capacity to secure all the value of the assembly or destroy it. If a panel is poorly soldered due to poor Oven setup or incorrect programming of the profile the recovery of the panel is at best expensive, at worst a loss. For these challenges people are turning to Vapor Phase.
Technical Library | 2018-10-24 18:04:12.0
Polymer Thick Film (PTF)-based printed electronics (aka Printed Electronics) has improved in durability over the last few decades and is now a proven alternative to copper circuitry in many applications once thought beyond the capability of PTF circuitry. This paper describes peak performance and areas for future improvement.State-of-the-art PTF circuitry performance includes the ability to withstand sharp crease tests, 85C/85%RH damp heat 5VDC bias aging (silver migration), auto seat durability cycling, SMT mandrel flexing, and others. The IPC/SGIA subcommittee for Standards Tests development has adopted several ASTM test methods for PTF circuitry and is actively developing needed improvements or additions. These standards are described herein. Advantages of PTF circuitry over copper include: varied conductive material compositions, lower cost and lower environmental impact. Necessary improvements include: robust integration of chip and power, higher conductivity, and fine line multi-layer patterning.
Technical Library | 2012-11-29 14:23:58.0
1000 units per day) production environment presents challenging technical, logistic and cost obstacles that are usually more complex than those encountered at the inspection (automated optical inspection) and the manufacturing process test step (in-circuit test).
Technical Library | 2016-11-30 15:53:15.0
The use of microvias in Printed Circuit Boards (PCBs) for military hardware is increasing as technology drives us toward smaller pitches and denser circuitry. Along with the changes in technology, the industry has changed and captive manufacturing lines are few and far between. As PCBs get more complicated, the testing we perform to verify the material was manufactured to our requirements before they are used in an assembly needs to be reviewed to ensure that it is sufficient for the technology and meets industry needs to better screen for long-term reliability. The Interconnect Stress Testing (IST) protocol currently used to identify manufacturing issues in plated through holes, blind, or buried vias are not necessarily sufficient to identify problems with microvias. There is a need to review the current IST protocol to determine if it is adequate for finding bad microvias or if there is a more reliable test that will screen out manufacturing inconsistencies. The objective of this research is to analyze a large population of PCB IST coupons to determine if there is a more effective IST test to find less reliable microvias in electrically passing PCB product and to screen for manufacturing deficiencies. The proposed IST test procedure will be supported with visual inspection of corresponding microvia cross sections and Printed Wiring Assembly (PWA) acceptance test results. The proposed screening will be shown to only slightly affect PCB yield while showing a large benefit to screening before PCBs are used in an assembly.
Technical Library | 2019-02-27 15:23:47.0
A study was performed to investigate, evaluate and qualify new reworkable underfill materials to be used primarily with ball grid arrays (BGAs), Leadless SMT devices, QFNs, connectors and passive devices to improve reliability. The supplier of the sole source, currently used underfill, has indicated they may discontinue its manufacture in the near future. The current underfill material is used on numerous circuit card assemblies (CCAs) at several sites and across multiple programs/business areas. In addition, it is used by several of our contract CCA suppliers.The study objectives include evaluation of material properties for down select, dispensability and rework evaluation for further down select, accelerated life testing for final selection and qualification; and process development to implement into production and at our CCA suppliers. The paper will describe the approach used, material property test results and general findings relative to process characteristics and rework ability.
