Technical Library | 2017-08-31 13:43:48.0
Wire bonded packages using conventional copper leadframe have been used in industry for quite some time. The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Proper optimization of wire bond parameters and machine settings are essential for good yields. Wire bond process can generate a variety of defects such as lifted bond, cracked metallization, poor intermetallic etc. NSOP – non-stick on pad is a defect in wire bonding which can affect front end assembly yields. In this condition, the imprint of the bond is left on the bond pad without the wire being attached. NSOP failures are costly as the entire device is rejected if there is one such failure on any bond pad. The paper presents some of the failure modes observed and the efforts to address NSOP reduction
Technical Library | 2020-08-27 01:22:45.0
Initially adopted internal specifications for acceptance of printed circuit boards (PCBs) used for wire bonding was that there were no nodules or scratches allowed on the wirebond pads when inspected under 20X magnification. The nodules and scratches were not defined by measurable dimensions and were considered to be unacceptable if there was any sign of a visual blemish on wire-bondable features. Analysis of the yield at a PCB manufacturer monitored monthly for over two years indicated that the target yield could not be achieved, and the main reasons for yield loss were due to nodules and scratches on the wirebonding pads. The PCB manufacturer attempted to eliminate nodules and scratches. First, a light-scrubbing step was added after electroless copper plating to remove any co-deposited fine particles that acted as a seed for nodules at the time of copper plating. Then, the electrolytic copper plating tank was emptied, fully cleaned, and filtered to eliminate the possibility of co-deposited particles in the electroplating process. Both actions greatly reduced the density of the nodules but did not fully eliminate them. Even though there was only one nodule on any wire-bonding pad, the board was still considered a reject. To reduce scratches on wirebonding pads, the PCB manufacturer utilized foam trays after routing the boards so that they did not make direct contact with other boards. This action significantly reduced the scratches on wire-bonding pads, even though some isolated scratches still appeared from time to time, which caused the boards to be rejected. Even with these significant improvements, the target yield remained unachievable. Another approach was then taken to consider if wire bonding could be successfully performed over nodules and scratches and if there was a dimensional threshold where wire bonding could be successful. A gold ball bonding process called either stand-off-stitch bonding (SSB) or ball-stitch-on-ball bonding (BSOB) was used to determine the effects of nodules and scratches on wire bonds. The dimension of nodules, including height, and the size of scratches, including width, were measured before wire bonding. Wire bonding was then performed directly on various sizes of nodules and scratches on the bonding pad, and the evaluation of wire bonds was conducted using wire pull tests before and after reliability testing. Based on the results of the wire-bonding evaluation, the internal specification for nodules and scratches for wirebondable PCBs was modified to allow nodules and scratches with a certain height and a width limitation compared to initially adopted internal specifications of no nodules and no scratches. Such an approach resulted in improved yield at the PCB manufacturer.
Technical Library | 2001-05-03 11:23:09.0
In this age of global competition, world class electronics manufacturers understand that increasing profit margins is accomplished not by increasing price or lowering the quality of components and workmanship, but by increasing production yields. Post-solder inspection ensures that your customers receive good product, but by separating the good boards from the bad boards you only measure yield, not improve it. A yield (and profit) improvement strategy consists of making measurements at critical stages, as early as possible in the assembly process, and adjusting the process parameters to achieve optimal performance.
Technical Library | 2016-11-17 14:37:41.0
With increasing LED development and production, thermal issues are becoming more and more important for LED devices, particularly true for high power LED and also for other high power devices. In order to dissipate the heat from the device efficiently, Au80Sn20 alloy is being used in the industry now. However there are a few drawbacks for Au80Sn20 process: (1) higher soldering temperature, usually higher than 320°C; (2) low process yield; (3) too expensive. In order to overcome the shortcomings of Au80Sn20 process, YINCAE Advanced Materials, LLC has invented a new solderable adhesive – TM 230. Solderable adhesives are epoxy based silver adhesives. During the die attach reflow process, the solder material on silver can solder silver together, and die with pad together. After soldering, epoxy can encapsulate the soldered interface, so that the thermal conductivity can be as high as 58 W/mk. In comparison to Au80Sn20 reflow process, the solderable adhesive has the following advantages: (1) low process temperature – reflow peak temperature of 230°C; (2) high process yield – mass reflow process instead of thermal compression bonding process; (3) low cost ownership. In this paper we are going to present the die attach process of solderable adhesive and the reliability test. After 1000 h lighting of LED, it has been found that there is almost no decay in the light intensity by using solderable adhesive – TM 230.
Technical Library | 2021-11-10 20:07:46.0
Main Points * Technologies for the job * More than a flat piece of Stainless * Compatibility * Solubility in stencil cleaning * Influencing factors * Best Practices to reduce misprints and increase yields
Technical Library | 2010-01-19 19:12:08.0
Learn how Trace, Track and Control (TTC) solutions help manufacturers cut cost, cut waste, automate critical manufacturing processes, and increase yields—all critical elements in today’s economic environment.
Technical Library | 2011-06-29 14:44:52.0
High yields in the stencil printing process are essential to a profitable SMT assembly operation. But as circuit complexity continues to increase, so do the challenges of maintaining a successful solder paste deposition process. To help assemblers address
Technical Library | 2014-07-24 16:26:34.0
Wire bonding a die to a package has traditionally been performed using either aluminum or gold wire. Gold wire provides the ability to use a ball and stitch process. This technique provides more control over loop height and bond placement. The drawback has been the increasing cost of the gold wire. Lower cost Al wire has been used for wedge-wedge bonds but these are not as versatile for complex package assembly. The use of copper wire for ball-stitch bonding has been proposed and recently implemented in high volume to solve the cost issues with gold. As one would expect, bonding with copper is not as forgiving as with gold mainly due to oxide growth and hardness differences. This paper will examine the common failure mechanisms that one might experience when implementing this new technology.
Technical Library | 2014-06-05 16:44:07.0
Stencil printing capability is becoming more important as the range of component sizes assembled on a single board increases. Coupled with increased component density, solder paste sticking to the aperture sidewalls and bottom of the stencil can cause insufficient solder paste deposits and solder bridging. Yield improvement requires increased focus on stencil technology, printer capability, solder paste functionality and understencil cleaning.(...) The purpose of this research is to study the wipe sequence, wipe frequency and wipe solvent(s) and how these factors interact to provide solder paste printing yield improvement.
Technical Library | 2009-07-15 12:14:31.0
The increasing demand for smaller & smaller portable electrical devices is leading to the increasing usage of extremely small components in the SMT assembly lines. With the introduction of 01005 packages in mass production, all the different stages of the line are facing new challenges: from board design, through component placement to reflow process. Each stage introduces some specific types of defect which are considered impossible to repair due to the small size of the package. AOI has become an essential tool to enable good yield in the assembly of 01005.
