Technical Library | 2024-09-02 18:48:58.0
The conversion to higher temperature "Lead Free" assembly reflow conditions has created an increased awareness that entrapped or absorbed moisture is a frequent root cause of thermally induced delamination at assembly reflow. There are two connected failure modes from entrapped moisture; incomplete resin cross-linking resulting in premature resin decomposition and also severe Z axis expansion from "explosive vaporization of the entrapped moisture at elevated temperatures at assembly reflow". Ultimately, both result in delamination failure. Other papers have shown the negative effects of entrapped moisture before lamination including delamination, red color, reduced thermal reliability and increased high speed signal loss. In this paper, various materials were tested for moisture sensitivity during lamination. Tests were performed at varying lamination conditions including a pre-vacuum step and "kiss" step. Pressure and cure temperature parameters were evaluated for minimizing or eliminating the effect of trapped moisture. Also included are the results of inner layer moisture removal baking conditions and their effect on peel strength and thermal reliability.
Technical Library | 2011-06-16 18:59:43.0
Based on tests carried out with commercially available chemistry, this paper discusses the advantages available through the use of NEAP processes for inner layer bonding and soldermask pretreatment. The process is characterized with a view to high volume
Technical Library | 2011-10-06 13:59:04.0
The desire to have more functionality into increasingly smaller size end products has been pushing the PCB and IC Packaging industry towards High Density Interconnect (HDI) and 3D Packaging (stacked dies, embedded packaged components). Many companies in the high-end consumer electronics market place have been embedding passive chip components on inner PCB and IC Packages for a few years now. However, embedding packaged components on inner layers has remained elusive for the broader market due to lack of proper design tools and high cost of embedding components on inner layers (...) This paper will highlight several key industrialization aspects addressed in the frame of the European funded FP7 HERMES* project to build a manufacturing environment for products with embedded components. The program entered its third year and is now dealing with the manufacturing of functional demonstrators as an introduction to industrialization.
Technical Library | 2011-10-20 22:03:30.0
Results of FEM modelling of thermal stress analysis in printed circuit boards are given in the article. It is shown that thermal stress alone is not solely caused by differences in coefficients of thermal expansion of individual layers. The emergence of thermal stress is subject to both the layered structure of the wall and given boundary conditions, as well as the existence of a temperature gradient in the direction normal to the surface of the wall. A practical application focuses on the issue of recycling of PCB with the effort to achieve separation of layers due to thermal stress. Role modelling of thermal stress in this area lies in predicting the possibility of separation, depending on the type of thermal stress and material parameters.
Technical Library | 2015-08-20 15:18:38.0
Increasing system integration and component densities continue to significantly reduce the opportunity to access nets using standard test points. Over time the size of test points has been drastically reduced (as small as 0.5 mm in diameter) but current product design parameters have created space and access limitations that remove even the option for these test points. Many high speed signal lines have now been restricted to inner layers only. Where surface traces are still available for access, bead probe technology is an option that reduces test point space requirements as well as their effects on high speed nets and distributes mechanical loading away from BGA footprints enabling test access and reducing the risk of mechanical defects associated with the concentration of ICT spring forces under BGA devices. Building on Celestica's previous work characterizing contact resistance associated with Pr-free compatible surface finishes and process chemistry; this paper will describe experimentation to define a robust process window for the implementation of bead probe and similar bump technology that is compatible with standard Pb-free assembly processes. Test Vehicle assembly process, test methods and "Design of Experiments" will be described. Bead Probe formation and deformation under use will also be presented along with selected results.
Technical Library | 2018-09-21 10:12:53.0
Moisture accumulates during storage and industry practice recommends specific levels of baking to avoid delamination. This paper will discuss the use of capacitance measurements to follow the absorption and desorption behaviour of moisture. The PCB design used in this work, focused on the issue of baking out moisture trapped between copper planes. The PCB was designed with different densities of plated through holes and drilled holes in external copper planes, with capacitance sensors located on the inner layers. For trapped volumes between copper planes, the distance between holes proved to be critical in affecting the desorption rate. For fully saturated PCBs, the desorption time at elevated temperatures was observed to be in the order of hundreds of hours. Finite difference diffusion modelling was carried out for moisture desorption behaviour for plated through holes and drilled holes in copper planes. A meshed copper plane was also modelled evaluating its effectiveness for assisting moisture removal and decreasing bake times. Results also showed, that in certain circumstances, regions of the PCB under copper planes initially increase in moisture during baking.
Technical Library | 2014-07-02 16:46:09.0
Growth behaviors of intermetallic compounds (IMCs) and Kirkendall voids in Cu/Sn/Cu microbump were systematically investigated by an in-situ scanning electron microscope observation. Cu–Sn IMC total thickness increased linearly with the square root of the annealing time for 600 h at 150°C, which could be separated as first and second IMC growth steps. Our results showed that the growth behavior of the first void matched the growth behavior of second Cu6Sn5, and that the growth behavior of the second void matched that of the second Cu3Sn. It could be confirmed that double-layer Kirkendall voids growth kinetics were closely related to the Cu–Sn IMC growth mechanism in the Cu/Sn/Cu microbump, which could seriously deteriorate the mechanical and electrical reliabilities of the fine-pitch microbump systems
Technical Library | 2024-09-02 17:01:54.0
A printed circuit board (PCB) is an integral component of any electronic product and is among the most challenging components to recycle. While PCB manufacturing processes undergo generations of innovation and advancement with 21st century technologies, the recycling of PCBs primarily employs 1920's shredding and separation technologies. There is a critical need for alternative PCB recycling routes to satisfy the increasing environmental demands. Previous work has developed an environmentally benign supercritical fluid process that successfully delaminated the PCB substrates and separated the PCB layers. While this work was successful in delamination of the PCB substrates, further understanding is needed to maximize the interactions between the supercritical fluid and PCB for an optimal processing scenario. As such, this research presents an exploratory study to further investigate the supercritical fluid PCB recycling process by using supercritical carbon dioxide and an additional amount of water to delaminate PCB substrates. The focus of this study is to test delamination success at low temperature and pressure supercritical conditions in comparison to the previous studies. Furthermore, material characterization methods, such as differential scanning calorimetry, dynamic mechanical analysis, and Fourier transform infrared spectroscopy, are included to study the delaminating mechanisms. Results from the recycling process testing showed that the PCB substrates delaminated easily and could be further separated into copper foils, glass fibers and polymers. Surprisingly, the material characterization suggested that there were no significant changes in glass transition temperature, crosslink density, and FTIR spectra of the PCBs before and after the supercritical fluid process.
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