Technical Library | 2012-12-17 22:05:22.0
Package on Package (PoP) has become a relatively common component being used in mobile electronics as it allows for saving space in the board layout due to the 3D package layout. To insure device reliability through drop tests and thermal cycling as well as for protecting proprietary programming of the device either one or both interconnect layers are typically underfilled. When underfill is applied to a PoP, or any component for that matter, there is a requirement that the board layout is such that there is room for an underfill reservoir so that the underfill material does not come in contact with surrounding components. The preferred method to dispensing the underfill material is through a jetting process that minimizes the wet out area of the fluid reservoir compared to traditional needle dispensing. To further minimize the wet out area multiple passes are used so that the material required to underfill the component is not dispensed at once requiring a greater wet out area. Dispensing the underfill material in multiple passes is an effective way to reduce the wet out area and decrease the distance that surrounding components can be placed, however, this comes with a process compromise of additional processing time in the underfill dispenser. The purpose of this paper is to provide insight to the inverse relationship that exists between the wet out area of the underfill reservoir and the production time for the underfill process.
Technical Library | 2021-12-16 01:52:32.0
Package on Packages (PoP) find use in applications that require high performance with increased memory density. One of the greatest benefits of PoP technology is the elimination of the expensive and challenging task of routing high-speed memory lines from under the processor chip out to memory chip in separate packages. Instead, the memory sits on top of the processor and the connections are automatically made during assembly. For this reason PoP technology has gained wide acceptance in cell phones and other mobile applications. PoP technology can be assembled using one-pass and two-pass assembly processes. In the one-pass technique the processor is first mounted to the board, the memory is mounted to the processor and the finished board is then run through the reflow oven in a single pass. The two-pass technique has an intermediate step in which the memory is first mounted onto the processor.
Technical Library | 2015-03-04 10:56:26.0
As the proliferation of modern day electronics continues to drive miniaturization and functionality, electronic designers/assemblers face the issue of environmental exposure and uncommon applications never previously contemplated. This reality, coupled with the goal of reducing the environmental and health implications of the production and disposal of these devices, has forced manufacturers to reconsider the materials used in production. Furthermore, the need to increase package density and reduce costs has led to the rapid deployment of leadless packages such as QFN, POP, LGA, and Micro-BGA. In many cases, the manufacturers of these devices will recommend the use of no clean fluxes due to concerns over the ability to consistently remove flux residues from under and around these devices. These concerns, along with the need to implement a tin whisker mitigation strategy and/or increase environmental tolerance, have led to the conundrum of applying conformal coating over no clean residues.
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