Technical Library: miniaturized (Page 4 of 9)

SELECTIVE SOLDERING TECHNOLOGY SELECTION

Technical Library | 2023-11-14 19:42:24.0

Selective soldering is not a new process. It is already exists and used 30 years ago for through-hole component by different industries for automotive and medical products. Now most manufacturing industries are moving forward on SMD's miniaturization to reduce PCB complexity and balance component density on the board to ensure a good assembling process. By this concept, why selective soldering still utilized and used? Does it because of component reliability, uniqueness or complexity having this in mind next question will be which platform will best fit for the product

Shenzhen Kaifa Technology Co., Ltd.

Benefits of Manual X-Ray Inspection for Medium-Sized EMS and OEM suppliers

Technical Library | 2023-11-20 17:42:33.0

Zero-defect strategies and increased demands on the production of assemblies are making quality assurance in electronics production increasingly important. Continous miniaturization of components, ever higher packing densities and the associated hard-to-view assembly areas, as well as the increased use of components such as BGAs, QFNs and QFPs, pose a considerable challenge when it comes to high-precision quality control.

Viscom AG

Laser Direct Imaging of Tracks on PCB Covered With Laser Photoresist

Technical Library | 2008-04-15 14:43:08.0

The increasing demands for miniaturization and better functionality of electronic components and devices have a significant effect on the requirements facing the printed circuit board (PCB) industry. PCB manufactures are driving for producing high density interconnect (HDI) boards at significantly reduced cost and reduced implementation time. The interconnection complexity of the PCB is still growing and today calls for 50/50 μm or 25/25 μm technology are real. Existing technologies are unable to offer acceptable solution. Recently the Laser Direct Imaging (LDI) technology is considered as an answer for these challenges.

Unipress - Institute of High Pressure Physics of the Polish Academy of Sciences

Miniaturization with Help of Reduced Component to Component Spacing

Technical Library | 2015-03-12 18:26:16.0

Miniaturization and the integration of a growing number of functions in portable electronic devices require an extremely high packaging density for the active and passive components. There are many ways to increase the packaging density and a few examples would be to stack them with Package on Package (PoP), fine pitch CSP's, 01005 and last but not least reduced component to component spacing for active and passive components (...)This paper will discuss different layouts, assembly and material selections to reduce component to component spacing down to 100-125um (4-5mil) from today’s mainstream of 150-200um (6-8mil) component to component spacing.

Flex (Flextronics International)

Miniaturizing IoT Designs

Technical Library | 2016-11-23 00:26:50.0

As we wirelessly connect more and more devices to the Internet, electronics engineers face several challenges, including how to package a radio transmitter into their existing device real estate and how to make increasingly smaller devices. They’re also striving to meet consumer demand for Internet of Things (IoT) products that are ergonomically easy to use and unobtrusive to the environment. This whitepaper explores the challenges that come with designing connected devices into increasingly smaller products, specifically antenna integration, and how system-inpackage modules can help.

Silicon Labs

Advanced Organic Substrate Technologies To Enable Extreme Electronics Miniaturization.

Technical Library | 2014-08-14 17:58:41.0

High reliability applications for high performance computing, military, medical and industrial applications are driving electronics packaging advancements toward increased functionality with decreasing degrees of size, weight and power (SWaP) The substrate technology selected for the electronics package is a key enabling technology towards achieving SWaP. Standard printed circuit boards (PWBs) utilize dielectric materials containing glass cloth, which can limit circuit density and performance, as well as inhibit the ability to achieve reliable assemblies with bare semiconductor die components. Ceramic substrates often used in lieu of PWBs for chip packaging have disadvantages of weight, marginal electrical performance and reliability as compared to organic technologies. Alternative materials including thin, particle-containing organic substrates, liquid crystal polymer (LCP) and microflex enable SWaP, while overcoming the limitations of PWBs and ceramic. This paper will discuss the use of these alternative organic substrate materials to achieve extreme electronics miniaturization with outstanding electrical performance and high reliability. The effect of substrate type on chip-package interaction and resulting reliability will be discussed. Microflex assemblies to achieve extreme miniaturization and atypical form factors driven by implantable and in vivo medical applications are also shown.

i3 Electronics

Duo-Solvent Cleaning Process Development for Removing Flux Residue from Class 3 Hardware

Technical Library | 2016-07-28 17:00:20.0

Packaging trends enable disruptive technologies. The miniaturization of components reduces the distance between conductive paths. Cleanliness of electronic hardware based on the service exposure of electrical equipment and controls can improve the reliability and cost effectiveness of the entire system. Problems resulting from leakage currents and electrochemical migration lead to unintended power disruption and intermittent performance problems due to corrosion issues.Solvent cleaning has a long history of use for cleaning electronic hardware. Limitations with solvent based cleaning agents due to environmental effects and the ability to clean new flux designs commonly used to join miniaturized components has limited the use of solvent cleaning processes for cleaning electronic hardware. To address these limitations, new solvent cleaning agents and processes have been designed to clean highly dense electronic hardware.The research study will evaluate the cleaning and electrical performance using the IPC B-52 Test Vehicle. Lead Free noclean solder paste will be used to join the components to the test vehicle. Ion Chromatography and SIR values will be reported.

KYZEN Corporation

High Reliability and High Temperature Application Solution - Solder Joint Encapsulant Paste

Technical Library | 2017-10-16 15:03:32.0

The miniaturization and advancement of electronic devices have been the driving force of design, research and development, and manufacturing in the electronic industry. However, there are some issues occurred associated with the miniaturization, for examples, warpage and reliability issues. In order to resolve these issues, a lot of research and development have been conducted in the industry and university with the target of moderate melting temperature solder alloys such as m.p. 280°C. These moderate temperature alloys have not resolve these issues yet due to the various limitations. YINCAE has been working on research and development of the materials with lower temperature soldering for higher temperature application. To meet this demand, YINCAE has developed solder joint encapsulant paste to enhance solder joint strength resulting in improving drop and thermal cycling performance to eliminate underfilling, edge bonding or corner bonding process in the board level assembly process. This solder joint encapsulant paste can be used in typical lead-free profile and after reflow the application temperature can be up to over 300C, therefore it also eliminates red glue for double side reflow process. In this paper, we will discuss the reliability such as strength of solder joints, drop test performance and thermal cycling performance using this solder joint encapsulant paste in detail.

YINCAE Advanced Materials, LLC.

High Reliability and High Throughput Ball Bumping Process Solution – Solder Joint Encapsulant Adhesives

Technical Library | 2018-04-05 10:40:43.0

The miniaturization of microchips is always driving force for revolution and innovation in the electronic industry. When the pitch of bumps is getting smaller and smaller the ball size has to be gradually reduced. However, the reliability of smaller ball size is getting weaker and weaker, so some traditional methods such as capillary underfilling, corner bonding and edge bonding process have been being implemented in board level assembly process to enhance drop and thermal cycling performance. These traditional processes have been increasingly considered to be bottleneck for further miniaturization because the completion of these processes demands more space. So the interest of eliminating these processes has been increased. To meet this demand, YINCAE has developed solder joint encapsulant adhesives for ball bumping applications to enhance solder joint strength resulting in improving drop and thermal cycling performance to eliminate underfilling, edge bonding or corner bonding process in the board level assembly process. In this paper we will discuss the ball bumping process, the reliability such as strength of solder joints, drop test performance and thermal cycling performance.

YINCAE Advanced Materials, LLC.

Effect of Nano-Coated Stencil on 01005 Printing

Technical Library | 2021-11-17 18:53:50.0

The demand for product miniaturization, especially in the handheld device area, continues to challenge the board assembly industry. The desire to incorporate more functionality while making the product smaller continues to push board design to its limit. It is not uncommon to find boards with castle-like components right next to miniature components. This type of board poses a special challenge to the board assemblers as it requires a wide range of paste volume to satisfy both small and large components. One way to address the printing challenge is to use creative stencil design to meet the solder paste requirement for both large and small components. ... The most important attribute of a stencil is its release characteristic. In other words, how well the paste releases from the aperture. The paste release, in turn, depends on the surface characteristics of the aperture wall and stencil foil. The recent introduction of new technology, nano-coating for both stencil and squeegee blades, has drawn the attention of many researchers. As the name implies, nano-coated stencils and blades are made by a conventional method such as laser-cut or electroformed then coated with nano-functional material to alter the surface characteristics. This study will evaluate nano-coated stencils for passive component printing, including 01005.

Speedline Technologies, Inc.


miniaturized searches for Companies, Equipment, Machines, Suppliers & Information