Technical Library: oven chain pin (Page 1 of 1)

Surface Finish Issues Affecting Solderability and Reliability

Technical Library | 2019-06-07 14:49:54.0

ACI Technologies was contacted in regards to poor solder joint reliability. The customer submitted an assembly that was exhibiting intermittent opens at multiple locations on a ball grid array (BGA) component. The assembly’s functionality did not survive international shipping, essentially shock and vibration failures, immediately making the quality of the solder joints suspect. The customer was asked about the contract manufacturer and the reflow oven profile as well as the solder paste and surface finish used. The ACI engineering staff evaluated the contract manufacturer’s technique and determined that they were competent in the methods they used for placing thermocouples in the proper locations and developing the reflow oven profile. The surface finish was unusual, but not unheard of, in that it was hard gold over hard nickel, rather than electroless nickel immersion gold (ENIG). The customer was able to supply boundary scan testing data which showed a diagonal row of troublesome BGA pins.

ACI Technologies, Inc.

Effective Methods to Get Volatile Compounds Out of Reflow Process

Technical Library | 2016-02-11 18:26:43.0

Although reflow ovens may not have been dramatically changed during the last decade the reflow process changes step by step. With the introduction of lead-free soldering not only operation temperatures increased, but also the chemistry of the solder paste was modified to meet the higher thermal requirements. Miniaturization is a second factor that impacts the reflow process. The density on the assembly is increasing where solder paste deposit volumes decreases due to smaller pad and component dimensions. Pick and place machines can handle more components and to meet this high through put some SMD lines are equipped with dual lane conveyors, doubling solder paste consumption. With the introduction of pin in paste to solder through hole components contamination of the oven increased due to dripping of the paste.

Vitronics Soltec

Rework of New High Speed Press Fit Connectors

Technical Library | 2019-06-06 00:19:02.0

More and more people and things are using electronic devices to communicate. Subsequently, many electronic products, in particular mobile base stations and core network nodes, need to handle enormous amounts of data per second. One important link in this communication chain is high speed pressfit connectors that are often used to connect mother boards and back planes in core network nodes. These new high speed pressfit connectors have several hundreds of thin, short and weak pins that are prone to damage. Small variations in via hole dimensions or hole plating thickness affect the connections; if the holes are too small, the pins may be bentor permanently deformed and if the holes are too large they will not form gas tight connections.The goal of this project was to understand how rework of these new high speed pressfit connectors affects connection strengths, hole wall deformations and plating cracks.

HDP User Group

How to Manage Material Outgassing in Reflow Oven

Technical Library | 2020-11-24 23:12:27.0

In a lead-free reflow process, temperatures are higher, and materials use outgasses more than in a leaded reflow process. The trends toward higher density populated boards and more pin-in-paste technology also increase solder paste use. More components and more solder paste result in more outgassing of chemistry during the reflow process. Some assemblies report condensation of vapors when the cold printed circuit board enters the oven. Little is known about the interaction between these condensed materials in terms of the interaction between these condensed materials and the reliability of the assembly. Apart from the question of reliability, a printed circuit board contaminated with a small film of residues after reflow soldering is not desirable.

Vitronics Soltec

Streamlining PCB Assembly and Test NPI with Shared Component Libraries

Technical Library | 2016-04-08 01:19:52.0

PCB assembly designs become more complex year-on-year, yet early-stage form/fit compliance verification of all designed-in components to the intended manufacturing processes remains a challenge. So long as librarians at the design and manufacturing levels continue to maintain their own local standards for component representation, there is no common representation in the design-to-manufacturing phase of the product lifecycle that can provide the basis for transfer of manufacturing process rules to the design level. A comprehensive methodology must be implemented for all component types, not just the minority which happen to conform to formal packaging standards, to successfully left-shift assembly and test DFM analysis to the design level and thus compress NPI cycle times.(...)This paper will demonstrate the technological components of the working solution: the logic for deriving repeatable and standardized package and pin classifications from a common source of component physical-model content, the method for associating DFA and DFT rules to those classifications, and the transfer of those rules to separate DFM and NPI analysis tools elsewhere in the design-through-manufacturing chain resulting in a consistent DFM process across multiple design and manufacturing organizations.

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