Technical Library | 2020-10-27 02:07:31.0
For companies that choose to take the Pb-free exemption under the European Union's RoHS Directive and continue to manufacture tin-lead (Sn-Pb) electronic products, there is a growing concern about the lack of Sn-Pb ball grid array (BGA) components. Many companies are compelled to use the Pb-free Sn-Ag-Cu (SAC) BGA components in a Sn-Pb process, for which the assembly process and solder joint reliability have not yet been fully characterized. A careful experimental investigation was undertaken to evaluate the reliability of solder joints of SAC BGA components formed using Sn-Pb solder paste. This evaluation specifically looked at the impact of package size, solder ball volume, printed circuit board (PCB) surface finish, time above liquidus and peak temperature on reliability. Four different BGA package sizes (ranging from 8 to 45 mm2) were selected with ball-to-ball pitch size ranging from 0.5mm to 1.27mm. Two different PCB finishes were used: electroless nickel immersion gold (ENIG) and organic solderability preservative (OSP) on copper. Four different profiles were developed with the maximum peak temperatures of 210oC and 215oC and time above liquidus ranging from 60 to 120 seconds using Sn-Pb paste. One profile was generated for a lead-free control. A total of 60 boards were assembled. Some of the boards were subjected to an as assembled analysis while others were subjected to an accelerated thermal cycling (ATC) test in the temperature range of -40oC to 125oC for a maximum of 3500 cycles in accordance with IPC 9701A standard. Weibull plots were created and failure analysis performed. Analysis of as-assembled solder joints revealed that for a time above liquidus of 120 seconds and below, the degree of mixing between the BGA SAC ball alloy and the Sn-Pb solder paste was less than 100 percent for packages with a ball pitch of 0.8mm or greater. Depending on package size, the peak reflow temperature was observed to have a significant impact on the solder joint microstructural homogeneity. The influence of reflow process parameters on solder joint reliability was clearly manifested in the Weibull plots. This paper provides a discussion of the impact of various profiles' characteristics on the extent of mixing between SAC and Sn-Pb solder alloys and the associated thermal cyclic fatigue performance.
Technical Library | 2013-03-27 23:43:40.0
Vapor phase, once cast to the annals’ of history is making a comeback. Why? Reflow technology is well developed and has served the industry for many years, it is simple and it is consistent. All points are true – when dealing with the centre section of the bell curve. Today’s PCB manufacturers are faced with many designs which no longer fall into that polite category but rather test the process engineering groups with heavier and larger panels, large ground planes located in tricky places, component mass densities which are poorly distributed, ever changing Pb Free alloys and higher process temperatures. All the time the costs for the panels increase, availability of “process trial” boards diminishes and yields are expected to be extremely high with zero scrap rates. The final process in the assembly line has the capacity to secure all the value of the assembly or destroy it. If a panel is poorly soldered due to poor Oven setup or incorrect programming of the profile the recovery of the panel is at best expensive, at worst a loss. For these challenges people are turning to Vapor Phase.
Technical Library | 2016-12-29 15:37:51.0
The reliabilities of the flux residue of electronic assemblies and semiconductor packages are attracting more and more attention with the adoption of no-clean fluxes by majority of the industry. In recent years, the concern of "partially activated" flux residue and their influence on reliability have been significantly raised due to the miniaturization along with high density design trend, selective soldering process adoption, and the expanded use of pallets in wave soldering process. When flux residue becomes trapped under low stand-off devices, pallets or unsoldered areas (e.g. selective process), it may contain unevaporated solvent, "live" activators and metal complex intermediates with different chemical composition and concentration levels depending on the thermal profiles. These partially-activated residues can directly impact the corrosion, surface insulation and electrochemical migration of the final assembly. In this study, a few application tests were developed internally to understand this issue. Two traditional liquid flux and two newly developed fluxes were selected to build up the basic models. The preliminary results also provide a scientific approach to design highly reliable products with the goal to minimize the reliability risk for the complex PCB designs and assembly processes. This paper was originally published by SMTA in the Proceedings of SMTA International
Technical Library | 2020-03-26 14:55:29.0
This paper introduces line confocal technology that was recently developed to characterize 3D features of various surface and material types at sub-micron resolution. It enables automatic microtopographic 3D imaging of challenging objects that are difficult or impossible to scan with traditional methods, such as machine vision or laser triangulation.Examples of well-suited applications for line confocal technology include glossy, mirror-like, transparent and multi-layered surfaces made of metals (connector pins, conductor traces, solder bumps etc.), polymers (adhesives, enclosures, coatings, etc.), ceramics (components, substrates, etc.) and glass (display panels, etc.). Line confocal sensors operate at high speed and can be used to scan fast-moving surfaces in real-time as well as stationary product samples in the laboratory. The operational principle of the line confocal method and its strengths and limitations are discussed.Three metrology applications for the technology in electronics product manufacturing are examined: 1. 3D imaging of etched PCBs for micro-etched copper surface roughness and cross-sectional profile and width of etched traces/pads. 2. Thickness, width and surface roughness measurement of conductive ink features and substrates in printed electronics applications. 3. 3D imaging of adhesive dots and lines for shape, dimensions and volume in PCB and product assembly applications.
Technical Library | 2021-06-21 19:34:02.0
In this era of electronics miniaturization, high yield and low-cost integrated circuit (IC) substrates play a crucial role by providing a reliable method of high density interconnection of chip to board. In order to maximize substrate real-estate, the distance between Cu traces also known as line and space (L/S) should be minimized. Typical PCB technology consists of L/S larger than 40 µ whereas more advanced wafer level technology currently sits at or around 2 µm L/S. In the past decade, the chip size has decreased significantly along with the L/S on the substrate. The decreasing chip scales and smaller L/S distances has created unique challenges for both printed circuit board (PCB) industry and the semiconductor industry. Fan-out panel-level packaging (FOPLP) is a new manufacturing technology that seeks to bring the PCB world and IC/semiconductor world even closer. While FOPLP is still an emerging technology, the amount of high-volume production in this market space provide a financial incentive to develop innovative solutions in order to enable its ramp up. The most important performance aspect of the fine line plating in this market space is plating uniformity or planarity. Plating uniformity, trace/via top planarity, which measures how flat the top of the traces and vias are a few major features. This is especially important in multilayer processing, as nonuniformity on a lower layer can be transferred to successive layers, disrupting the device design with catastrophic consequences such as short circuits. Additionally, a non-planar surface could also result in signal transmission loss by distortion of the connecting points, like vias and traces. Therefore, plating solutions that provide a uniform, planar profile without any special post treatment are quite desirable.
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