Technical Library | 2023-01-17 17:58:36.0
Heterogeneous integration has become an important performance enabler as high-performance computing (HPC) demands continue to rise. The focus to enable heterogeneous integration scaling is to push interconnect density limit with increased bandwidth and improved power efficiency. Many different advanced packaging architectures have been deployed to increase I/O wire / area density for higher data bandwidth requirements, and to enable more effective die disaggregation. Embedded Multi-die Interconnect Bridge (EMIB) technology is an advanced, cost-effective approach to in-package high density interconnect of heterogeneous chips, providing high density I/O, and controlled electrical interconnect paths between multiple dice in a package. In emerging architectures, it is required to scale down the EMIB die bump pitch in order to further increase the die-to-die (D2D) communication bandwidth. Aa a result, bump pitch scaling poses significant challenges in the plated solder bump reflow process, e.g., bump height / coplanarity control, solder wicking control, and bump void control. It's crucial to ensure a high-quality solder bump reflow process to meet the final product reliability requirements. In this paper, a combined formic acid based fluxless and vacuum assisted reflow process is developed for fine pitch plated solder bumping application. A high-volume production (HVM) ready tool has been developed for this process.
Technical Library | 2017-04-20 13:51:14.0
The one constant in electronics manufacturing is change. Moore's Law, which successfully predicted a rate of change at which transistor counts doubled on Integrated Circuits (ICs) at lower cost for decades, is ceding to be an appropriate prediction tool. Increasing technical and economic requirements, deriving from the semiconductor environment, are cascaded down to the printed circuit and in particular to the IC substrate manufacturers. This is both a challenge and an opportunity for IC Substrate manufacturers, when dealing with the demands of the packaging market. (...)This paper introduces two new electroless copper baths developed for IC substrates manufacturing based on Semi Additive Process (SAP) technology (hereafter referred to as E'less Copper IC) and HDI production (hereafter referred to as E'less Copper HDI) and optimized for high throw into BMVs. An introduction to reliable throwing power measurement methods based on scanning electron microscope (SEM) is given, followed by a compilation and discussion of key performance criteria for each application, namely throwing power, copper adhesion on the substrate, dry film adhesion and reliability.
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