Technical Library | 2019-05-23 21:56:56.0
Automatic on-line shoe sole spraying system: automatic shoe sole spraying system, simple and convenient operation, using 3D vision positioning system. Automatic recognition and automatic generation of spraying trajectory. Robot non-contact spraying gun is used to complete the process of shoe sole spraying with maturity, stability, high speed and high precision along the predetermined trajectory. The automatic generation of spraying trajectory is the realization of shoe sole spraying technology. Shoe sole spraying characteristics: 1.Positioning System: 3D Visual Positioning 2.Components: Intelligent Robot, Laser Scanner, Industrial Computer, Gum Spraying System, Conveyor Belt, Electrical Control System, etc. 3.Spraying time: slightly different according to shoe size and spraying time Fully automatic sole spraying advantages: 1. Simple application: suitable for soles of different specifications, models and sizes 2. Faster speed: 6-8 seconds to complete sole scanning and spraying, superior to similar products at home and abroad. 3. Quality stability: gum spraying trajectory is scheduled, gum dosage is fixed, gum spraying quality is greatly improved. 4. High cost performance: the same performance, the price is only 1/3 of the same type of equipment of European brand. 5. Reduce wear and tear: glue is fully utilized and not wasted, reducing human contact with glue. Intelligent operation advantage manual only need general operation can be automated workshop, mechanical arm automatic spraying glue, accurate spraying, reduce glue waste. Environmental protection effect of long-term close contact with glue seriously affects human health and mechanical work, glue does not directly contact, do not harm the human body. Fully automatic spraying, shoe sole adhesion process for automatic spraying machine, will not cause great challenges! With the deepening of personalized shoemaking, higher requirements have been put forward for the spraying technology in shoemaking process. The method of creating spraying trajectory must be adapted to shoes of different sizes and styles. The automatic generation of spraying trajectory is one of the key technologies to realize the automation of shoe sole spraying process. The method of off-line programming and real-time generation of spraying trajectory for robots based on the three-dimensional CAD model of sole and the data of sole. A new method of generating spray trajectory by scanning the sole of shoe upper with linear structured light sensor is presented. The feasibility of the method is verified by industrial robots. Aiming at the need of generating shoe sole spray rubber trajectory based on line structured light, the format standard of IGES file of three-dimensional model of shoe sole was tested. The shoe sole contour line and the shoe sole surface were extracted, and then the offset curve of the shoe sole contour line on the shoe sole surface was calculated to obtain the spray rubber trajectory. Three-dimensional profilometer is to use structured light to obtain sole information, effectively improve the automatic shoemaking spraying process, which will help to improve the efficiency of shoemaking, improve the quality of footwear products, and promote the development of personalized shoemaking.
Technical Library | 2021-06-21 19:34:02.0
In this era of electronics miniaturization, high yield and low-cost integrated circuit (IC) substrates play a crucial role by providing a reliable method of high density interconnection of chip to board. In order to maximize substrate real-estate, the distance between Cu traces also known as line and space (L/S) should be minimized. Typical PCB technology consists of L/S larger than 40 µ whereas more advanced wafer level technology currently sits at or around 2 µm L/S. In the past decade, the chip size has decreased significantly along with the L/S on the substrate. The decreasing chip scales and smaller L/S distances has created unique challenges for both printed circuit board (PCB) industry and the semiconductor industry. Fan-out panel-level packaging (FOPLP) is a new manufacturing technology that seeks to bring the PCB world and IC/semiconductor world even closer. While FOPLP is still an emerging technology, the amount of high-volume production in this market space provide a financial incentive to develop innovative solutions in order to enable its ramp up. The most important performance aspect of the fine line plating in this market space is plating uniformity or planarity. Plating uniformity, trace/via top planarity, which measures how flat the top of the traces and vias are a few major features. This is especially important in multilayer processing, as nonuniformity on a lower layer can be transferred to successive layers, disrupting the device design with catastrophic consequences such as short circuits. Additionally, a non-planar surface could also result in signal transmission loss by distortion of the connecting points, like vias and traces. Therefore, plating solutions that provide a uniform, planar profile without any special post treatment are quite desirable.
Technical Library | 2015-08-20 15:18:38.0
Increasing system integration and component densities continue to significantly reduce the opportunity to access nets using standard test points. Over time the size of test points has been drastically reduced (as small as 0.5 mm in diameter) but current product design parameters have created space and access limitations that remove even the option for these test points. Many high speed signal lines have now been restricted to inner layers only. Where surface traces are still available for access, bead probe technology is an option that reduces test point space requirements as well as their effects on high speed nets and distributes mechanical loading away from BGA footprints enabling test access and reducing the risk of mechanical defects associated with the concentration of ICT spring forces under BGA devices. Building on Celestica's previous work characterizing contact resistance associated with Pr-free compatible surface finishes and process chemistry; this paper will describe experimentation to define a robust process window for the implementation of bead probe and similar bump technology that is compatible with standard Pb-free assembly processes. Test Vehicle assembly process, test methods and "Design of Experiments" will be described. Bead Probe formation and deformation under use will also be presented along with selected results.
Technical Library | 2016-11-30 15:53:15.0
The use of microvias in Printed Circuit Boards (PCBs) for military hardware is increasing as technology drives us toward smaller pitches and denser circuitry. Along with the changes in technology, the industry has changed and captive manufacturing lines are few and far between. As PCBs get more complicated, the testing we perform to verify the material was manufactured to our requirements before they are used in an assembly needs to be reviewed to ensure that it is sufficient for the technology and meets industry needs to better screen for long-term reliability. The Interconnect Stress Testing (IST) protocol currently used to identify manufacturing issues in plated through holes, blind, or buried vias are not necessarily sufficient to identify problems with microvias. There is a need to review the current IST protocol to determine if it is adequate for finding bad microvias or if there is a more reliable test that will screen out manufacturing inconsistencies. The objective of this research is to analyze a large population of PCB IST coupons to determine if there is a more effective IST test to find less reliable microvias in electrically passing PCB product and to screen for manufacturing deficiencies. The proposed IST test procedure will be supported with visual inspection of corresponding microvia cross sections and Printed Wiring Assembly (PWA) acceptance test results. The proposed screening will be shown to only slightly affect PCB yield while showing a large benefit to screening before PCBs are used in an assembly.
Technical Library | 2018-04-18 23:55:01.0
Higher functionality, higher performance and higher reliability with smaller real estate are the mantras of any electronic device and the future guarantees more of the same. In order to achieve the requirements of these devices, designs must incorporate fine line and via pitch while maintain good circuitry adhesion at a smooth plating-resin interface to improve signal integrity. The Semi-Additive Process (SAP) is a production-proven method used on low dielectric loss tangent (Df) build-up materials that enables the manufacture of ultra-fine circuitry. (...) This paper will discuss a new SAP process for low loss build-up materials with low desmear roughness (Ra= 40-100 nm) and excellent adhesion (610-680 gf/cm) at various processing conditions. Along with the process flow, the current work will also present results and a discussion regarding characterization on the morphology and composition of resin and/or metal plating surfaces using scanning electron microscopy (SEM) and energy dispersive X-ray spectroscopy (EDX), surface roughness analysis, plating-resin adhesion evaluation from 90o peel tests
Technical Library | 2020-05-07 03:46:27.0
The selective soldering process has evolved to become a standard production process within the electronics assembly industry, and now accommodates a wide variety of through-hole component formats in numerous applications. Most through-hole components can be easily soldered with the selective soldering process without difficulty, however some types of challenging components require additional attention to ensure optimum quality control is maintained. Several high thermal mass components can place demands on the selective soldering process, while the use of specialized solder fixtures and/or pallets often places an additional thermal demand on the preheating process. Fine-pitch through-hole components and connectors place a different set of demands on the selective soldering process and typically require special attention to lead projection and traverse speed to minimize bridging between adjacent pins. Dual in-line memory module (DIMM) connectors, compact peripheral component interface (cPCI) connectors, coax connectors and other high thermal mass components as well as fine-pitch microconnectors,can present challenges when soldered into backplanes or multilayer printed circuit board assemblies. Adding to this challenge, compact peripheral component interface connectors can present additional solderability issues due to their beryllium copper termination pins.
Technical Library | 2023-12-18 21:07:29.0
Selective soldering utilises a nozzle to apply solder to components on the underside of printed circuit boards (PCBs). This nozzle can be moved to either perform dips (depositing solder to a single component) or draws (applying solder to several components in a single movement). The selective soldering methodology thereby allows the process to be tailored to specific joints and allows multiple nozzle types to be used if required on the circuit board. Nozzles can vary by size (internal diameter) and shape (making them suitable for different process types). This is all dictated by board design and process requirements. Selection of the nozzle type is dependent upon the product to be soldered and the desired cycle time. Examples of different nozzle types are shown here. Hand-load selective systems must be programmed with the parameters for multiple solder joints. However, many in-line systems are designed to be modular. This modularity allows for multiple solder stations with different conditions/nozzles to achieve low cycle times. Figure 1 shows the two distinct types of selective soldering systems offered by Pillarhouse International Ltd.
Technical Library | 2022-08-08 15:06:06.0
Selective soldering has evolved to become a standard production process within the electronics assembly industry, and now accommodates a wide variety of through-hole component formats in numerous applications. Most through-hole components can be easily soldered with the selective soldering process without difficulty however some types of challenging components require additional attention to ensure that optimum quality is maintained. Several high thermal mass components can place demands on the selective soldering process, while the use of specialized solder fixtures, or solder pallets, often places additional thermal demand on the preheating process. Fine-pitch through-hole components and connectors place a different set of demands on the selective soldering process and typically require special attention to lead projection and traverse speed to minimize bridging between adjacent pins. Dual in-line memory module (DIMM) connectors, compact peripheral component interface (cPCI) connectors, coax connectors and other high thermal mass components as well as fine-pitch microconnectors, can present challenges when soldered into backplanes or multilayer printed circuit board assemblies. Adding to this challenge, compact peripheral component interface connectors can present additional solderability issues because of their beryllium copper base metal pins. Key Terms: Selective soldering, drop-jet fluxing, sustained preheating, flux migration, adjacent clearance, lead-to-hole aspect ratio, lead projection, thermal reliefs, gold embrittlement, solderability testing.
Technical Library | 2020-09-02 22:02:13.0
With the adoption of Wafer Level Packages (WLP) in the latest generation mobile handsets, the Printed Circuit Board (PCB) industry has also seen the initial steps of High Density Interconnect (HDI) products migrating away from the current subtractive processes towards a more technically adept technique, based on an advanced modified Semi Additive Process (amSAP). This pattern plate process enables line and space features in the region of 20um to be produced, in combination with fully filled, laser formed microvias. However, in order to achieve these process demands, a step change in the performance of the chemical processes used for metallization of the microvia is essential. In the electroless Copper process, the critical activator step often risks cross contamination by the preceding chemistries. Such events can lead to uncontrolled buildup of Palladium rich residues on the panel surface, which can subsequently inhibit etching and lead to short circuits between the final traces. In addition, with more demands being placed on the microvia, the need for a high uniformity Copper layer has become paramount, unfortunately, as microvia shape is often far from ideal, the deposition or "throw" characteristics of the Copper bath itself are also of critical importance. This "high throwing power" is influential elsewhere in the amSAP technique, as it leads to a thinner surface Copper layer, which aids the etching process and enables the ultra-fine features being demanded by today's high end PCB applications. This paper discusses the performance of an electroless Copper plating process that has been developed to satisfy the needs of challenging amSAP applications. Through the use of a radical predip chemistry, the formation, build up and deposition of uncontrolled Pd residues arising from activator contamination has been virtually eradicated. With the adoption of a high throwing power Copper bath, sub 30um features are enabled and microvia coverage is shown to be greatly improved, even in complex via shapes which would otherwise suffer from uneven coverage and risk premature failure in service. Through a mixture of development and production data, this paper aims to highlight the benefits and robust performance of the new electroless Copper process for amSAP applications
