Technical Library | 2014-05-12 09:24:11.0
With the advancement of the electronic industry, Package on package (POP) has become increasingly popular IC package for electronic devices, particularly in mobile devices due to its benefits of miniaturization, design flexibility and cost efficiency. However, there are some issues that have been reported such as SIR drop due to small gap between top and bottom components, difficulty underfilling and rework due to stacked IC components and process yield issues. Some suppliers have reported using some methods such as dipping epoxy paste or epoxy flux to address these issues, but so far, no customer has reported using these methods or materials in their mass production. In order to address these issues for POP assembly, YINCAE has successfully developed a first individual solder joint encapsulant adhesive.
Technical Library | 2014-06-02 11:03:45.0
With the advancement of the electronic industry, package on package (POP) has become increasingly popular IC package for electronic devices, particularly POP TMV (Through Mold Vials) in mobile devices due to its benefits of miniaturization, design flexibility and cost efficiency. However, there are some issues that have been reported such as SIR drop due to small gap between top and bottom components, difficulty underfilling and rework due to stacked IC components and process yield issues. Some suppliers have reported using some methods such as dipping epoxy paste or epoxy flux to address these issues, but so far no customer has reported using these methods or materials in their mass production. In order to address these issues for POP TMV assembly, YINCAE has successfully developed and commercialized the first individual solder joint encapsulant adhesive for mass production for years.
Technical Library | 2021-09-21 20:20:22.0
The electronics industry has been using the epoxy puck for the processing of the vast majority of electronics microsections since the 1970s. Minimal advancements have been seen in the methods used for precision micro-sections of PCBs, PCBAs, and device packages. This paper will discuss different techniques and approaches in performing precision and analytical micro-sections, which fuse the techniques and materials common in preparation of silicon wafers and bulk materials. These techniques have not only been found to produce excellent optical results, but transfer effectively to SEM for high magnification inspection and further analysis with minimal post-lapping preparation needed. Additionally, processing time is reduced primarily due to a significant reduction of bulk material removal earlier in the preparation, therefore needing less removal at later lapping steps compared to traditional sectioning methods. Additional techniques are introduced that mitigate some classic challenges experienced by technicians over the decades.
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