Technical Library | 2009-12-03 14:27:29.0
This paper provides additional data in support of shelf life extension for BGA and Die Size BGA (DSBGA) Packages.
Technical Library | 2009-12-03 12:51:58.0
Each year the semiconductor industry routes a significant volume of devices to recycling sites for no reliability or quality rationale beyond the fact that those devices were stored on a warehouse shelf for two years. This study identifies the key risks attributed to extended storage of devices in uncontrolled indoor environments and the risk mitigation required to permit safe shelf-life extension.
Technical Library | 1999-05-06 15:31:13.0
Tin plating on a component lead makes its soldering easier. Everybody knows that. Not so well known is that tin plating has shelf life -- its ability to be easily soldered degrades over time. the speed and severity of degradation depends both on storage conditions and on the plating itself...
Technical Library | 2007-10-02 22:09:50.0
The vast majority (99%) of the electronics market in North America is composed of products produced for commercial applications. The 1% share of the electronics market driven by Department of Defense (DoD) applications has created a niche market for RF qualified devices. The DoD, with its emphasis on COTS (Commercial Off The Shelf) and "Open" systems, is beginning to become more interested in using commercially oriented RF devices for military applications as a means to leverage the volumes and innovations of the commercial world.
Technical Library | 2024-06-19 15:23:54.0
Each year the semiconductor industry routes a significant volume of devices to recycling sites for no reliability or quality rationale beyond the fact that those devices were stored on a warehouse shelf for two years. This study identifies the key risks attributed to extended storage of devices in uncontrolled indoor environments and the risk mitigation required to permit safe shelf-life extension. Component reliability was evaluated after extended storage to assure component solderability, MSL stability and die surface integrity. Packing materials were evaluated for customer use parameters as well as structural integrity and ESD properties. Results show that current packaging material (mold compound and leadframe) is sufficiently robust to protect the active integrated circuits for many decades and permit standard reflow solder assembly beyond 15 years. Standard packing materials (bags, desiccant, and humidity cards) are robust for a 32 month storage period that can be extended by repacking with fresh materials. Packing materials designed for long term storage are effective for more than five years.
Technical Library | 1999-05-06 11:42:16.0
The most reliable and well-designed electronic device can malfunction or fail if it overheats. Considering thermal issues early in the design process results in a thermally conscious system layout and minimizes costs through the use of passive cooling and off-the-shelf components. When thermal issues are left until completion of the design, the only remaining solution may be a costly custom heat sink that requires all the space available. Incorporating a heat sink or a fan into a product after it is fully developed can be expensive, and still may not provide sufficient cooling of the device.
Technical Library | 2021-12-21 23:01:30.0
High density PWB (printed wiring board) with microvia technology is required for implementation of high density and high I/O area array packages (AAP). COTS (commercial off-the-shelf) AAP packaging technologies in high reliability versions with 1.27 mm pitch are now being considered for use in a number of NASA systems including the Space Shuttle and Mars Rovers. NASA functional system designs are requiring ever more denser AAP packages and board features, making board microvia technology very attractive for effectively routing a large number of package inputs/outputs.
Technical Library | 2023-09-18 14:10:01.0
As with many advancements in the electronics industry, consumer electronics is driving the trends for electronic packaging technologies toward reducing size and increasing functionality. Microelectronics meeting the technology needs for higher performance, reduced power consumption and size, and off the- shelf availability. Due to the breadth of work being performed in the area of microelectronics packaging/components, this report limits it presentation to board design, manufacturing, and processing parameters on assembly reliability for leadless (e.g., quad flat no-lead (QFN) or a generic term of bottom termination component (BTC)) packages. This style of package was selected for investigation because of its significant growth, lower cost, and improved functionality, especially for use in an RF application.
Technical Library | 2024-06-19 13:59:50.0
The solderability of a nickel-palladium-gold (Ni-Pd-Au) finish on a Cu substrate was evaluated for the Pb-free solder, 95.5Sn-3.9Ag-0.6 Cu (wt.%, abbreviated Sn-Ag-Cu) and the eutectic 63Sn-37 Pb (Sn-Pb) alloy. The solder temperature was 245ºC. The flux was a rosin-based mildly activated (RMA) solution. The Ni-Pd-Au finish was tested in the as-fabricated condition as well as after exposure to one of the following accelerated storage (shelf life) regiments:
Technical Library | 2013-03-14 17:19:28.0
Commercial-off-the-shelf ball/column grid array packaging (COTS BGA/CGA) technologies in high reliability versions are now being considered for use in a number of National Aeronautics and Space Administration (NASA) electronic systems. Understanding the process and quality assurance (QA) indicators for reliability are important for low-risk insertion of these advanced electronic packages. This talk briefly discusses an overview of packaging trends for area array packages from wire bond to flip-chip ball grid array (FCBGA) as well as column grid array (CGA). It then presents test data including manufacturing and assembly board-level reliability for FCBGA packages with 1704 I/Os and 1-mm pitch, fine pitch BGA (FPBGA) with 432 I/Os and 0.4-mm pitch, and PBGA with 676 I/Os and 1.0-mm pitch packages. First published in the 2012 IPC APEX EXPO technical conference proceedings.
