Technical Library | 2010-03-04 18:11:53.0
While the electronics manufacturing industry has been occupied with the challenge of RoHS compliance and with it, Pb-free soldering, established trends of increasing functionality and miniaturization have continued. The increasing use of ultra-fine pitch and area-array devices presents challenges in both printing and flux technology. With the decrease in both the size and the pitch of said components, new problems may arise, such as head-in-pillow and graping defects
Technical Library | 2010-06-17 20:48:04.0
The solder paste deposition process is viewed by many in the industry as the leading contributor of defects in the Surface Mount Technology (SMT) assembly process. As with all manufacturing processes, solder paste printing is subject to both special and common cause variation. Just like using graduated cylinders from distinctly different manufacturing processes to measure a volume of liquid, using different blades types can contribute significant special cause variation to a process. Understanding the significant differences in print performance between blade types is an important first step to establishing a standard blade for an SMT process.
Technical Library | 2018-07-18 16:28:26.0
Reduction of first pass defects in the SMT assembly process minimizes cost, assembly time and improves reliability. These three areas, cost, delivery and reliability determine manufacturing yields and are key in maintaining a successful and profitable assembly process. It is commonly accepted that the solder paste printing process causes the highest percentage of yield challenges in the SMT assembly process. As form factor continues to get smaller, the challenge to obtain 100% yield becomes more difficult.This paper will identify defects affecting SMT yields in the printing process and discuss their Root Cause. Outer layer copper weight and surface treatment will also be addressed as to their effect on printability. Experiments using leadless and emerging components will be studied and root cause analysis will be presented
Technical Library | 2008-05-28 18:41:53.0
This paper describes correlation between a true 2D area measurement (e.g. printer) and a height map generated area from a SPI system. In addition, this paper will explore the correlation between area/volume measurements and bridge detection between 2D/3D techniques. The ultimate goal is to arm the process engineers with information that can be used to make decision that will impact defects, cost, throughput and Return On Investment.
Technical Library | 2023-04-17 17:05:47.0
In an ideal world, manufacturing devices would work all of the time, however, every company receives customer returns for a variety of reasons. If these returned parts contributed to a fail, most companies will perform failure analysis (FA) on the returned parts to determine the root cause of the failure. Failure can occur for a multitude of reasons, for example: wear out, fatigue, design issues, manufacturing flaw or defect. This information is then used to improve the overall quality of the product and prevent reoccurrence. If no defect is found, it is possible that in fact the product has no defect. On the other hand, the defect could be elusive and the FA techniques insufficient to detect said deficiency. No-clean flux residues can cause intermittent or elusive, hard to find defects. In an attempt to understand the effects of no-clean flux residues from the secondary soldering and cleaning processes, a matrix of varying process and cleaning operation was investigated. Of special interest, traveling flux residues and entrapped residues were examined, as well as localized and batch cleaning processes. Various techniques were employed to test the remaining residues in order to assess their propensity to cause a latent failure. These techniques include Surface Insulation Resistance1 (SIR) testing at 40⁰C/90% RH, 5 VDC bias along with C32 testing and Ion Exchange Chromatography (IC). These techniques facilitate the assessment of the capillary effect the tight spacing these component structures have when flux residues are present. It is expected that dendritic shorting and measurable current leakage will occur, indicating a failing SIR test. However, since the residue resides under the discrete components, there will be no visual evidence of dendritic growth or metal migration.
Technical Library | 2022-09-25 20:03:37.0
Cracking remains the major reason of failures in multilayer ceramic capacitors (MLCCs) used in space electronics. Due to a tight quality control of space-grade components, the probability that as manufactured capacitors have cracks is relatively low, and cracking is often occurs during assembly, handling and the following testing of the systems. Majority of capacitors with cracks are revealed during the integration and testing period, but although extremely rarely, defective parts remain undetected and result in failures during the mission. Manual soldering and rework that are often used during low volume production of circuit boards for space aggravate this situation. Although failures of MLCCs are often attributed to the post-manufacturing stresses, in many cases they are due to a combination of certain deviations in the manufacturing processes that result in hidden defects in the parts and excessive stresses during assembly and use. This report gives an overview of design, manufacturing and testing processes of MLCCs focusing on elements related to cracking problems. The existing and new screening and qualification procedures and techniques are briefly described and assessed by their effectiveness in revealing cracks. The capability of different test methods to simulate stresses resulting in cracking, mechanisms of failures in capacitors with cracks, and possible methods of selecting capacitors the most robust to manual soldering stresses are discussed.
Technical Library | 2019-04-07 22:47:46.0
How to protect your PCB from moisture related damage? J-STD-033 put forward stricter regulation on the MSD exposure environment,when the exposure time exceed the tolerated,the moisture will penetrate into electronics,Moreover, the newest RoHS regulation will rise soldering temperature,the sudden high temperature will lead to expansion and cracking on electronic components. In order to decrease the moisture defect on PCB for the manufacturers in China,Climatest Symor® begin to concentrated on electronic dry cabinet R&D since early 1990s,we specialize in handling temperature and humidity for 20 years,and we provide best solution for PCB storage.
Technical Library | 2015-07-01 16:51:43.0
Aerospace and military companies continue to exercise RoHS exemptions and to intensively research the long term attachment reliability of RoHS compliant solders. Their products require higher vibration, drop/shock performance, and combined-environment reliability than the conventional SAC305 alloy provides. The NASA-DoD Lead-Free Electronics Project confirmed that pad cratering is one of the dominant failure modes that occur in various board level reliability tests, especially under dynamic loading. One possible route to improvement of the mechanical and thermo-mechanical properties of solder joints is the use of Pb-free solders with lower process temperatures. Lower temperatures help reduce the possibility of damaging the boards and components, and also may allow for the use of lower Tg board materials which are less prone to pad cratering defects. There are several Sn-Ag-Bi and Sn-Ag-Cu-Bi alloys which melt about 10°C lower than SAC305. The bismuth in these solder compositions not only reduces the melting temperature, but also improves thermo-mechanical behavior. An additional benefit of using Bi-containing solder alloys is the possibility to reduce the propensity to whisker growth
Technical Library | 2014-12-11 18:00:09.0
The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Wire bonded packages using conventional copper lead frame have been used in industry for quite some time. However, the demand for consumer electronics is driving the need for flip chip interconnects as these packages shorten the signals, reduce inductance and improve functionality as compared to the wire bonded packages. The flip chip packages have solder bumps as interconnects instead of wire bonds and typically use an interposer or organic substrate instead of a metal lead frame (...) The paper provides a general overview of typical defects and failure modes seen in package assembly and reviews the efforts needed to understand new failure modes during package assembly. The root cause evaluations and lessons learned as the factory transitioned to thin form factor packages are shared
Technical Library | 2015-08-06 19:17:53.0
Fine pitch/fine feature solder paste printing in PCB assembly has become increasingly difficult as board geometries have become ever more compact. The printing process itself, traditionally the source of 70% of all assembly defects, finds its process window narrowing. The technology of metal blade squeegees, with the aid of new materials, understanding, and settings such as blade angle, has kept pace with all but the smallest applications, e.g., 200μ - .50 AR and 150μ - .375 AR, which have been pushing blade printing technology to its limits. Enclosed media print head technology has existed, and has been under increasing development, as an alternative to metal squeegee blade printing. Until recently, the performance of enclosed print heads had been comparable to the very best metal squeegees, but advances in enclosed print media technology have now made it a superior alternative to squeegee blades in virtually all applications.
