Technical Library | 2020-12-29 20:55:46.0
Voiding in solder joints has been studied extensively, and the effects of many variables compared and contrasted with respect to voiding performance. Solder paste flux, solder powder size, stencil design, circuit board design, via-in-pad design, surface finish, component size, reflow profile, vacuum reflow, nitrogen reflow and other parameters have been varied and voiding quantified for each. The results show some differences in voiding performance with respect to most of these variables but these variables are not independent of each other. Voiding in solder joints is a complex issue that often requires multiple approaches to reduce voiding below required limits. This paper focuses on solutions to voiding for commonly used bottom terminated components (BTCs).
Technical Library | 2023-12-18 20:41:20.0
This review of inert atmosphere for the electronics assembly processes will look at the benefits and attempt to close the gap on some of the misconceptions of using inert gases for electronics assembly. We will look at the reasons for using nitrogen and the cost benefits that come with the use of this inert atmosphere gas. As part of this review we will be explain the needs assessment and when you should use an inert atmosphere for your assembly process. Case studies will be provided to demonstrate the benefits of an inert atmosphere in the electronics assembly process area.
Technical Library | 2019-10-10 00:26:28.0
Voids are a plague to our electronics and must be eliminated! Over the last few years we have studied voiding in solder joints and published three technical papers on methods to "Fill the Void." This paper is part four of this series. The focus of this work is to mitigate voids for via in pad circuit board designs. Via holes in Quad Flat No-Lead (QFN) thermal pads create voiding issues. Gasses can come out of via holes and rise into the solder joint creating voids. Solder can also flow down into the via holes creating gaps in the solder joint. One method of preventing this is via plugging. Via holes can be plugged, capped, or left open. These via plugging options were compared and contrasted to each other with respect to voiding. Another method of minimizing voiding is through solder paste stencil design. Solder paste can be printed around the via holes with gas escape routes. This prevents gasses from via holes from being trapped in the solder joint. Several stencil designs were tested and voiding performance compared and contrasted. In many cases voiding will be reduced only if a combination of mitigation strategies are used. Recommendations for combinations of via hole plugging and stencil design are given. The aim of this paper is to help the reader to "Fill the Void."
Technical Library | 2013-12-27 10:39:21.0
The head-in-pillow defect has become a relatively common failure mode in the industry since the implementation of Pb-free technologies, generating much concern. A head-in-pillow defect is the incomplete wetting of the entire solder joint of a Ball-Grid Array (BGA), Chip-Scale Package (CSP), or even a Package-On-Package (PoP) and is characterized as a process anomaly, where the solder paste and BGA ball both reflow but do not coalesce. When looking at a cross-section, it actually looks like a head has pressed into a soft pillow. There are two main sources of head-in-pillow defects: poor wetting and PWB or package warpage. Poor wetting can result from a variety of sources, such as solder ball oxidation, an inappropriate thermal reflow profile or poor fluxing action. This paper addresses the three sources or contributing issues (supply, process & material) of the head-in-pillow defects. It will thoroughly review these three issues and how they relate to result in head-in pillow defects. In addition, a head-in-pillow elimination plan will be presented with real life examples will be to illustrate these head-in-pillow solutions.
Technical Library | 2008-01-10 19:24:48.0
This research takes an in-depth look at the challenges encountered in developing a lead free wave soldering process based on the specific products as well as on specific materials. It attempts to provide the reader with the information necessary to make educated decisions in selecting materials and controlling various process parameters in order to execute a rational implementation strategy for a reliable and robust lead free wave soldering process.
Technical Library | 2012-03-15 17:50:28.0
The competition in the EMS sector has considerably intensified over the last few years,. The enormous pressure to reduce production costs, which every service provider today has to face, frequently forces the organization to have a critical look at their
Technical Library | 2022-06-20 21:01:37.0
We've been doing a lot of print testing in our lab. In our first set of published results, "The Impact of Reduced Solder Alloy Powder Size on Solder Paste Print Performance1" from IPC/APEX 2016, we revealed a hierarchy of input variables to maximize solder paste transfer efficiency and minimize variation. In that study, we used a fully-optioned stencil as part of the equipment set. In order to tease out the data we were looking for, we could not lose critical information to the noise of stencil-induced variations.
Technical Library | 2007-10-10 23:23:40.0
Process engineers, who are seeking to achieve the most effective and reproducible thermal transfer process, look to today's forced convection ovens for applications such as flipchip, BGA, and lead-free soldering. A forced convection process to maximize thermal uniformity can be best accomplished by employing static pressure generation in what's known as "closed loop convection".
Technical Library | 2012-11-12 14:06:48.0
With consumers constantly looking for lower prices on their technology products and manufacturers trying to squeak out higher margins from their production lines, the need for process control and lower overhead costs have become even more important. One sector that is often overlooked is the hand soldering area of the factory. Many factories have been struggling with antiquated soldering systems for years. In some cases they are trying to make their investment in stations last much longer than they were designed for, or they are falsely trying to recoup their original investment ‐ all at the cost of higher operating expenses or even worse, reduced operator thru‐put.
Technical Library | 2018-03-05 11:17:31.0
In order to comply with RoHS and WEEE directives, many circuit assemblers are transitioning some or all of their soldering processes from tin-lead to lead-free within the upcoming year. There are no drop-in replacement alloys for tin-lead solder, which is driving a fundamental technology change. This change is forcing manufacturers to take a closer look at everything associated with the assembly process: board and component materials, logistics and materials management, solder alloys and processing chemistries, and even soldering methods. Do not expect a dramatic change in soldering behavior when moving to lead-free solders. The melting points of the alloys are higher, but at molten temperatures the different alloys show similar behaviors in a number of respects. Expect subtler changes, especially near the edges of a process window that is assumed based on tin-lead experience rather than defined through lead-free experimentation. These small changes, many of them yet to be identified and understood, will manifest themselves with lower assembly yields. The key to keeping yields up during the transition to lead-free is quickly learning what and where the subtle distinctions are, and tuning the process to accommodate them.
