Technical Library | 2022-10-11 20:15:14.0
The increased temperatures associated with Pb-free processes have produced significant challenges for PWB laminates. Newly developed laminates have different curing processes, are commonly filled with ceramic particles or micro-clays and can have higher Tg values. These changes which are aimed at improving the materials resistance to thermal excursions and maintaining electrical integrity through primary attach and rework operations have also had the effect of producing harder resin systems with lower fracture toughness.
Technical Library | 2014-11-18 23:59:30.0
Performance degradation of packaging material is an important reason for the lifetime reduction of LED. In order to understanding the failure behavior of packaging material, silicone and phosphor were chosen to fabricate LED samples within which an aging test at 125℃ was performed. The result of online luminance measurement showed that LED samples with both silicone and phosphor had the highest luminance decay rate among all test samples because the carbonization of silicone and the consequent outgassing reduced the luminance quickly. The result of the luminance variance with test time was analyzed and an exponential decay model was developed with which the lifetime of LED under high temperature could be estimated.
Technical Library | 2021-09-08 13:57:37.0
While the presence of silver in SAC solder provided excellent temperature cycling durability, the silver in high silver SAC alloy also made the solders susceptible to failures under drop/shock loading. To improve the drop/shock reliability, the silver content in SAC alloys was reduced from three percent, to as low as no silver. Solder dopants, also known as microalloy additions, are elements (typically 0.1% or lower) other than the main constituents of the alloy that have been shown to improve solder performance. Commonly used microalloy additions include nickel (Ni), bismuth (Bi), manganese (Mn), and antimony (Sb).
Technical Library | 2016-01-12 11:07:56.0
With the increasing demand of device miniaturization, high speed, more memory, more function, low cost, and more flexibility in device design and manufacturing chain, YINCAE has published a white paper on a first individual solder joint encapsulant which can eliminate underfilling process with at least five times solder joint increase and provide more flexibility for fine pitch and high density application. In order to meet the demand of manufacturing of high speed and low cost, YINCAE has invented a room temperature stable and jettable solder joint encapsulant adhesive – SMT 266. The invention of SMT 266 has allowed our customers to have more flexibility in their high-speed production line such as worry free on the work life of adhesive and workable jetting process.
Technical Library | 2020-01-01 17:06:52.0
The majority of electronic failures occur due to thermally induced stresses and strains caused by excessive differences in coefficients of thermal expansion (CTE) across materials.CTE mismatches occur in both 1st and 2nd level interconnects in electronics assemblies. 1st level interconnects connect the die to a substrate. This substrate can be underfilled so there are both global and local CTE mismatches to consider. 2nd level interconnects connect the substrate, or package, to the printed circuit board (PCB). This would be considered a "board level" CTE mismatch. Several stress and strain mitigation techniques exist including the use of conformal coating.
Technical Library | 2020-09-23 21:29:25.0
The electronics industry could benefit greatly from using a reliable, manufacturable, reduced temperature, SMT solder material (alloy-composition) which is cost competitive with traditional Sn3Ag0.5Cu (SAC305) solder. The many possible advantages and some disadvantages / challenges are discussed. Until recently, the use of Sn/Bi based materials has been investigated with negative consequences for high strain rate (drop-shock) applications and thus, these alloys have been avoided. Recent advances in alloy "doping" have opened the door to revisit Sn/Bi alloys as a possible alternative to SAC-305 for many applications. We tested the manufacturability and reliability of three low-temperature and one SAC-305 (used as a control) solder paste materials. Two of these materials are doped Sn/Bi/Ag and one is just Sn/Bi/Ag1%. We will discuss the tests and related results. And lastly, we will discuss the prospects, applications and possible implications (based on this evaluation) of these materials together with future actions.
Technical Library | 2022-10-11 17:27:08.0
Lead-free flux technology for electronic industry is mainly driven by high soldering temperature, high alloy surface tension, miniaturization, air soldering due to low cost consideration, and environmental concern. Accordingly, the flux features desired included high thermal stability, high resistance against burn-off, high oxidation resistance, high oxygen barrier capability, low surface tension, high fluxing capacity, slow wetting, low moisture pickup, high hot viscosity, and halogen-free. For each of the features listed above, corresponding desired chemical structures can be deduced, and the impact of those structures on flux residue cleanability can be speculated. Overall, lead-free flux technology results in a greater difficulty in cleaning. Cleaner with a better matching solvency for the residue as well as a higher cleaning temperature or agitation are needed. Alkaline and polar cleaner are often needed to deal with the larger quantity of fluxing products. Reactive cleaner is also desired to address the side reaction products such as crosslinked residue.
Technical Library | 2013-02-28 17:14:36.0
While it has long been known that the Cu6Sn5 intermetallic that plays a critical role in the reliability of solder joints made with tin-containing alloys on copper substrates exists in two different crystal forms over the temperature range to which electronics circuitry is exposed during assembly and service, it has only recently been recognized that the change from one form to the other has implications for solder joint reliability. (..) In this paper the authors report a study of the effect of cooling rates on Cu6Sn5 crystals. Cooling rates from 200°C ranged from 10°C/minute to 100°C/minute and the effect of isothermal ageing at intermediate temperatures was also studied. The extent of the phase transformation after each regime was determined using synchrotron X-ray diffraction. The findings have important implications for the manufacture of solder joints and their in-service performance... First published in the 2012 IPC APEX EXPO technical conference proceedings....
Technical Library | 2014-08-19 15:39:13.0
Understanding warpage of package attach locations on PCBs under reflow temperature conditions is critical in surface mount technology. A new industry standard, IPC 9641, addresses this topic directly for the first time as an international standard.This paper begins by summarizing the sections of the IPC 9641 standard, including, measurement equipment selection, test setup and methodology, and accuracy verification. The paper goes further to discuss practical implementation of the IPC 9641 standards. Key advantages and disadvantages between available warpage measurement methods are highlighted. Choosing the correct measurement technique depends on requirements for warpage resolution, data density, measurement volume, and data correlation. From industry experience, best practice recommendations are made on warpage management of PCB land areas, covering how to setup, run, analyze, and report on local area PCB warpage.The release of IPC 9641 shows that flatness over temperature of the package land area on the PCB is critical to the SMT industry. Furthermore, compatibility of shapes between attaching surfaces in SMT, like a package and PCB, will be critical to product yield and quality in years to come.
Technical Library | 2019-05-01 23:18:27.0
Moisture can accelerate various failure mechanisms in printed circuit board assemblies. Moisture can be initially present in the epoxy glass prepreg, absorbed during the wet processes in printed circuit board manufacturing, or diffuse into the printed circuit board during storage. Moisture can reside in the resin, resin/glass interfaces, and micro-cracks or voids due to defects. Higher reflow temperatures associated with lead-free processing increase the vapor pressure, which can lead to higher amounts of moisture uptake compared to eutectic tin-lead reflow processes. In addition to cohesive or adhesive failures within the printed circuit board that lead to cracking and delamination, moisture can also lead to the creation of low impedance paths due to metal migration, interfacial degradation resulting in conductive filament formation, and changes in dimensional stability. Studies have shown that moisture can also reduce the glass-transition temperature and increase the dielectric constant, leading to a reduction in circuit switching speeds and an increase in propagation delay times. This paper provides an overview of printed circuit board fabrication, followed by a brief discussion of moisture diffusion processes, governing models, and dependent variables. We then present guidelines for printed circuit board handling and storage during various stages of production and fabrication so as to mitigate moisture-induced failures.
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