Technical Library | 2021-10-12 18:01:49.0
The existence of counterfeit products, e.g., integrated circuits (ICs) and printed circuit boards (PCBs), in the modern semiconductor supply chain has seriously jeopardized the security and reliability of electronic systems, and has also caused the loss of suppliers' profit and reputation. Most of existing research papers prevent or detect counterfeit IC and PCB substrate separately, without testing the PCB as a whole, and often require the assistance of external equipment. In this article, a novel ring oscillator- based PCB authentication (ROPA) methodology to detect counterfeit PCB through supply chain is proposed, which ...
Technical Library | 2013-07-25 14:02:15.0
Bottom-termination components (BTC), such as QFNs, are becoming more common in PCB assemblies. These components are characterized by hidden solder joints. How are defects on hidden DFN joints detected? Certainly, insufficient solder joints on BTCs cannot be detected by manual visual inspection. Nor can this type of defect be detected by automated optical inspection; the joint is hidden by the component body. Defects such as insufficients are often referred to as "marginal" defects because there is likely enough solder present to make contact between the termination on the bottom-side of the component and the board pad for the component to pass in-circuit and functional test. Should the board be subjected to shock or vibration, however, there is a good chance this solder connection will fracture, leading to an open connection.
Technical Library | 2021-09-15 18:53:20.0
Many printed circuit board assemblies (PCBAs) have relays that are soldered to the PCB. If such an electromechanical component fails, it can cause the whole device to fail, just like any other electronic component. The spectrum of root causes that lead to an increased contact resistance or a complete contact failure is totally different from what usually occurs in the electronics domain. This article provides a detailed analysis of these failures and the corresponding root causes, many of them self-centering.
Technical Library | 2009-10-14 21:17:47.0
Electrochemical migration (ECM) is defined as the growth of conductive metal filaments across a printed circuit board (PCB) in the presence of an electrolytic solution and a DC voltage bias. ECM, also known as dendritic growth, is a critical issue in the electronics industry because the intermittent failure behavior of ECM is a likely root-cause of the high occurrence of field failures identified as no trouble found (NTF)/could not duplicate (CND)
Technical Library | 2021-07-20 20:12:20.0
Motivation: High reject rates for PCBs due to specification non-conformances Multiple rebuilds causing impactful schedule delays + Copper Wrap + Wicking + Etchback + Annular Ring Are rejected boards reliable? What are PCB quality requirements for? + Reliability: fewer cycles-to-failure? + Manufacturability: define threshold of modern manufacturing capability?
Technical Library | 2013-08-08 15:23:11.0
In this project Machine Vision PCB Inspection System is applied at the first step of manufacturing, i.e., the making of bare PCB. We first compare a PCB standard image with a PCB image, using a simple subtraction algorithm that can highlight the main problem-regions. We have also seen the effect of noise in a PCB image that at what level this method is suitable to detect the faulty image. Our focus is to detect defects on printed circuit boards & to see the effect of noise. Typical defects that can be detected are over etchings (opens), under-etchings (shorts), holes etc...
Technical Library | 2015-12-23 16:57:27.0
The onset of copper barrel cracks is typically induced by the presence of manufacturing defects. In the absence of discernible manufacturing defects, the causes of copper barrel cracks in printed circuit board (PCB) plated through holes is not well understood. Accordingly, there is a need to determine what affects the onset of barrel cracks and then control those causes to mitigate their initiation.The objective of this research is to conduct a design of experiment (DOE) to determine if there is a relationship between PCB fabrication processes and the prevalence of fine barrel cracks. The test vehicle used will be a 16-layer epoxy-based PCB that has two different sized plated through holes as well as buried vias.
Technical Library | 2020-08-27 01:22:45.0
Initially adopted internal specifications for acceptance of printed circuit boards (PCBs) used for wire bonding was that there were no nodules or scratches allowed on the wirebond pads when inspected under 20X magnification. The nodules and scratches were not defined by measurable dimensions and were considered to be unacceptable if there was any sign of a visual blemish on wire-bondable features. Analysis of the yield at a PCB manufacturer monitored monthly for over two years indicated that the target yield could not be achieved, and the main reasons for yield loss were due to nodules and scratches on the wirebonding pads. The PCB manufacturer attempted to eliminate nodules and scratches. First, a light-scrubbing step was added after electroless copper plating to remove any co-deposited fine particles that acted as a seed for nodules at the time of copper plating. Then, the electrolytic copper plating tank was emptied, fully cleaned, and filtered to eliminate the possibility of co-deposited particles in the electroplating process. Both actions greatly reduced the density of the nodules but did not fully eliminate them. Even though there was only one nodule on any wire-bonding pad, the board was still considered a reject. To reduce scratches on wirebonding pads, the PCB manufacturer utilized foam trays after routing the boards so that they did not make direct contact with other boards. This action significantly reduced the scratches on wire-bonding pads, even though some isolated scratches still appeared from time to time, which caused the boards to be rejected. Even with these significant improvements, the target yield remained unachievable. Another approach was then taken to consider if wire bonding could be successfully performed over nodules and scratches and if there was a dimensional threshold where wire bonding could be successful. A gold ball bonding process called either stand-off-stitch bonding (SSB) or ball-stitch-on-ball bonding (BSOB) was used to determine the effects of nodules and scratches on wire bonds. The dimension of nodules, including height, and the size of scratches, including width, were measured before wire bonding. Wire bonding was then performed directly on various sizes of nodules and scratches on the bonding pad, and the evaluation of wire bonds was conducted using wire pull tests before and after reliability testing. Based on the results of the wire-bonding evaluation, the internal specification for nodules and scratches for wirebondable PCBs was modified to allow nodules and scratches with a certain height and a width limitation compared to initially adopted internal specifications of no nodules and no scratches. Such an approach resulted in improved yield at the PCB manufacturer.
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