Technical Library | 2007-01-31 15:17:04.0
The goal of this project is to evaluate the reliability of lead-free BGA solder joints with a variety of different pad sizes using several different BGA rework methods. These methods included BGAs reworked with both flux only and solder paste attachment techniques and with or without the use of the BEST stay in place StencilQuick™. The daisy chained test boards were placed into a thermal test chamber and cycled between -25ºC to 125ºC over a 30 minute cycle with a 30 minute dwell on each end of the cycle. Each BGA on the board was wired and the continuity assessed during the 1000 cycles the test samples were in the chamber.
Technical Library | 2007-06-06 15:25:30.0
Though today's microvias and high aspect plated through holes (PTH's) look nothing like the earliest through holes of 40 years ago, the PTH in its various forms remains the “weak link” and most critical element of printed wiring boards and laminate chip carriers (...) The paper outlines an approach to evaluating PTH reliability and quality that involves characterizing PTH life across a range of temperatures to reveal intricacies not seen by testing at a single delta-T, and certainly difficult to predict by modeling alone.
Technical Library | 2008-04-29 15:50:45.0
The electronics industry is undergoing a materials evolution due to the pending Restriction of Hazardous Substances (RoHS) European Directive. Printed wiring board laminate suppliers, component fabricators, and printed wiring assembly operations are engaged in a multitude of investigations to determine what leadfree (Pbfree) material choices best fit their needs. The size and complexity of Pbfree implementation insures a transition period in which Pbfree and tin/lead solder finishes will be present on printed wiring assemblies
Technical Library | 2017-09-25 10:36:52.0
Laser wire stripping was developed by NASA in the 1970s as part of the Space Shuttle program. The technology made it possible to use smaller sized wires with thinner insulations, without risk of the damage that can be caused by traditional mechanical wire stripping methods. Laser wire stripping technology was commercialized in the 1990s and was initially used for aerospace and defense applications. Laser wire stripping then grew significantly when the consumer electronics market exploded as lasers became the only stripping solution for the tiny data cables found in laptops, mobile phones and other consumer electronics products. Another large industry that has adopted laser wire stripping methods, and for good reason, is high-end medical device manufacturing.
Technical Library | 2010-08-05 18:39:39.0
Variability analysis is important in successfully deploying multi-gigabit backplane printed wiring boards (PWBs) with growing numbers of high-speed SerDes links. We discuss the need for large sample sizes to obtain accurate variability estimates of SI me
Technical Library | 2021-12-16 01:45:05.0
In the 1990's, both BGA (Ball Grid Array) and CSP (Chip Size Package) are entering their end in the front-end packaging materials and process technology. Both BGA and CSP like SMD (Surface Mount Device) from the I 980's and THD (Through-Hole mount Device) from the 1970's are reaching its own impasse in terms of maximizing its electrical, mechanical, and thermal performances, size, weight, and reliability.
Technical Library | 2020-08-27 01:22:45.0
Initially adopted internal specifications for acceptance of printed circuit boards (PCBs) used for wire bonding was that there were no nodules or scratches allowed on the wirebond pads when inspected under 20X magnification. The nodules and scratches were not defined by measurable dimensions and were considered to be unacceptable if there was any sign of a visual blemish on wire-bondable features. Analysis of the yield at a PCB manufacturer monitored monthly for over two years indicated that the target yield could not be achieved, and the main reasons for yield loss were due to nodules and scratches on the wirebonding pads. The PCB manufacturer attempted to eliminate nodules and scratches. First, a light-scrubbing step was added after electroless copper plating to remove any co-deposited fine particles that acted as a seed for nodules at the time of copper plating. Then, the electrolytic copper plating tank was emptied, fully cleaned, and filtered to eliminate the possibility of co-deposited particles in the electroplating process. Both actions greatly reduced the density of the nodules but did not fully eliminate them. Even though there was only one nodule on any wire-bonding pad, the board was still considered a reject. To reduce scratches on wirebonding pads, the PCB manufacturer utilized foam trays after routing the boards so that they did not make direct contact with other boards. This action significantly reduced the scratches on wire-bonding pads, even though some isolated scratches still appeared from time to time, which caused the boards to be rejected. Even with these significant improvements, the target yield remained unachievable. Another approach was then taken to consider if wire bonding could be successfully performed over nodules and scratches and if there was a dimensional threshold where wire bonding could be successful. A gold ball bonding process called either stand-off-stitch bonding (SSB) or ball-stitch-on-ball bonding (BSOB) was used to determine the effects of nodules and scratches on wire bonds. The dimension of nodules, including height, and the size of scratches, including width, were measured before wire bonding. Wire bonding was then performed directly on various sizes of nodules and scratches on the bonding pad, and the evaluation of wire bonds was conducted using wire pull tests before and after reliability testing. Based on the results of the wire-bonding evaluation, the internal specification for nodules and scratches for wirebondable PCBs was modified to allow nodules and scratches with a certain height and a width limitation compared to initially adopted internal specifications of no nodules and no scratches. Such an approach resulted in improved yield at the PCB manufacturer.
Technical Library | 2015-12-23 16:57:27.0
The onset of copper barrel cracks is typically induced by the presence of manufacturing defects. In the absence of discernible manufacturing defects, the causes of copper barrel cracks in printed circuit board (PCB) plated through holes is not well understood. Accordingly, there is a need to determine what affects the onset of barrel cracks and then control those causes to mitigate their initiation.The objective of this research is to conduct a design of experiment (DOE) to determine if there is a relationship between PCB fabrication processes and the prevalence of fine barrel cracks. The test vehicle used will be a 16-layer epoxy-based PCB that has two different sized plated through holes as well as buried vias.
Technical Library | 2015-07-14 21:32:04.0
The PCB industry is ever changing and adapting to new technologies. OEM specifications and requirements have also advanced due to these technologies. In some cases the OEMs are asking for a low resistance test to be performed on some or all electrical test nets of the PCB or on the holes of the PCB. This requirement is typically not well defined on the fabrication drawing and that leads to misleading conclusions by the fabrication house (...) This paper will use the data gathered by the company’s operations to outline what a 4-wire Kelvin test is and how it can be used. Several examples will be illustrated of what the 4 wire Kelvin test can and cannot do. A clear definition of what limitations are present during the testing operation will be defined. The paper will assist designers in understanding how the low resistance test can assist them and also identify causes that can identify unwanted concerns/issues.
Technical Library | 2023-06-12 16:52:47.0
The technological advancement of component and PCB technology from through-hole to surface mount (SMT) is a major factor in the miniaturization of today's electronics. Smaller and smaller component sizes and more densely packed PCBs lead to more powerful designs in much smaller product packages. With advancement, however, comes a new set of challenges in building these smaller, more complex assemblies. This is the challenge original equipment manufacturers (OEM) and contract manufacturers (CM) face today.
